Intel Jobs
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- DFT Design Engineer · India, Bangalore
- Applied AI Engineer · India, Bangalore
- Process and Equipment Engineer · Malaysia, Kulim
- Wafer Level Assembly Process Engineer · US, New Mexico, Albuquerque
- Advanced Packaging Quality and Reliability Engineer · US, New Mexico, Albuquerque
- MPQ MDCX Engineering Intern · Costa Rica, San Jose
- Mechanical Design Engineer - Semiconductor Packaging · US, Arizona, Phoenix
- SW engineer - Silicon CAD tool development · US, California, Santa Clara
- Printed Circuit Boards (PCB) Technologist · 2 Locations
- Senior AI / Data Science Engineer · 2 Locations
- Semiconductor Device Modeling Engineer · 2 Locations
- Power Integrity Engineer · Malaysia, Penang
- Design Automation Engineer (TFM/EDA) · 4 Locations
- Director, Simulation Solutions and Business Development · India, Bangalore
- Senior Network Operations Engineer · 2 Locations
- Materials Program Manager · Ireland, Leixlip
- Ocotillo Technology Fabrication Lithography Module Engineer - Layer Owner · US, Arizona, Phoenix
- Software Enabling and Optimization Engineer · Poland, Gdansk
- Compiler Engineer · 5 Locations
- Government Information Security Engineer · 4 Locations
- Sr. Machine Learning Engineer · US
- Machine Learning Engineer Intern · US
- Sr Software Development Engineer · Mexico, Guadalajara
- CPU Debug, Power and Performance Laboratory Technician · Mexico, Guadalajara
- Systems and Solutions Engineer · 2 Locations
- Analog Layout Design Engineer · 2 Locations
- Process Integration Engineer · Ireland, Leixlip
- Packaging Module Development Engineer · US, Arizona, Phoenix
- Silicon Packaging Design Engineer · 2 Locations
- Module Engineer within Test Engineering Department · Vietnam, Ho_Chi_Minh_City
- Systems and Hardware Enabling Engineer · US, Oregon, Hillsboro
- Design Verification Architect · US, California, Folsom
- Intel Foundry Module Development Engineer · US, Oregon, Hillsboro
- Mixed Signal validation engineer ↗ · Folsom, CA, US
- Module Development Defect Inspection Engineer · US, Oregon, Hillsboro
- Analog Test Chip Industry Immersion Intern · Costa Rica, San Jose
- Estimating Controls Manager · 2 Locations
- FSMS Product Owner · 4 Locations
- Senior Physical Design Engineer · India, Bangalore
- AI Security Engineer Contract · 2 Locations
- Test Process and Equipment Engineer Intern · Vietnam, Ho_Chi_Minh_City
- Analog Circuit Design Engineer · 2 Locations
- Power & Performance Engineer · 2 Locations
- CPU Circuit Design Engineer · 2 Locations
- Graduate Talent (Design Verification Engineer) · 2 Locations
- Financial Services Technical Lead ↗ · Remote, US
- Memory Circuit Design Engineer · US, Texas, Austin
- Process Integration and Yield Engineer · US, Arizona, Phoenix
- Semiconductor Manufacturing Engineer (Contract) · Malaysia, Kulim
- Design Verification Engineer · India, Bangalore
- Manufacturing Engineer · US, Oregon, Hillsboro
- Instrumentation & Controls Project Engineer | Semiconductor Construction · Israel, Kiryat-Gat
- Physical Design Engineer · Guadalajara, Jalisco, Mexico
- IP RTL Senior Design Engineer · India, Bangalore
- Senior Director, Technical Program Manager · US, California, Santa Clara
- Silicon Product Engineer · US, Texas, Austin
- Commodity Manager · 2 Locations
- Senior Software Developer - Network and Collectives · 2 Locations
- Data Scientist/Statistician · 2 Locations
- Module Engineer · US, Oregon, Hillsboro
- Security Hardware Integration Engineer · 2 Locations
- IT Network Operation Engineer · Israel, Kiryat-Gat
- Yield Analytics Engineer · Malaysia, Penang
- System Software Engineer · US, Arizona, Phoenix
- Development Tools Software Engineer · US, California, Santa Clara
- Pre-Silicon IP System Validation Intern · Malaysia, Penang
- MDM Software Application Development Engineer · 4 Locations
- Intel Foundry Product Data Planner (PDP) · 3 Locations
- Firmware Development Engineer · US, California, Santa Clara
- Design Verification Intern · Vietnam, Ho_Chi_Minh_City
- OC Bulk Chemical Delivery Metrology Technician - Shift 5 · US, Arizona, Phoenix
- Construction Project Manager · US, Arizona, Phoenix
- Engineering Commodity Manager · 2 Locations
- IP Design Verification Engineer · 2 Locations
- Mixed Signal Logic Design Engineer · India, Bangalore
- SoC Verification Engineer · 3 Locations
- CPU Verification Engineer · US, Texas, Austin
- Technology Development Foundry Engineering – Staff Yield Engineer · 5 Locations
- Mixed Signal IP Verification Engineer · India, Bangalore
- Ocotillo Technology Fabrication Wet Etch Experienced Module Engineer · US, Arizona, Phoenix
- Analog IP Design Execution Manager · India, Bangalore
- TI AMHS PM · Israel, Kiryat-Gat
- Ocotillo Technology Fabrication Emergency Response Equipment Technician · US, Arizona, Phoenix
- D1 Bulk Chemical Delivery Metrology Technician · US, Oregon, Hillsboro
- Yield Debug NPI and Platform Solution Engineer · Malaysia, Penang
- HBI Module Development Engineer · US, Oregon, Hillsboro
- Senior Design Verification Engineer · India, Bangalore
- Mixed Signal Design Verification Engineer · India, Bangalore
- Senior CPU Design Verification Engineer · 2 Locations
- IT Network Student · Israel, Kiryat-Gat
- Logic Design Engineer · Israel, Haifa
- Supply Chain Data Scientist · São Paulo, Estado de São Paulo
- Sr. AI Software Engineer - Agent Harness · 4 Locations
- Power and Performance Engineer · US, California, Santa Clara
- SoC Power and Performance Engineer · US, California, Santa Clara
- ATD Experienced Laser Development Engineer · US, Arizona, Phoenix
- Graduate Talent (PDK QA Engineer) · Malaysia, Penang
- Graduate Talent (Physical Design Engineer) · Malaysia, Penang
- Graduate Talent (CPU Validation Engineer) · Malaysia, Penang
- CPU Validation Tool Architect · Malaysia, Penang
- Sr. Substrates Development and Ramp Engineer · Virtual China
- Strategy Lead, Global Enterprise Web ↗ · Remote, US
- Packaging Technical Program Manager · US, Arizona, Phoenix
- Manufacturing Equipment Technician (MTE) - Front End Nights Shift - Shift 4 · US, Arizona, Phoenix
- NM HOP Sort Contract Module Equipment Technician · US, New Mexico, Albuquerque
- ATD Laser Development Engineer · US, Arizona, Phoenix
- Sr. Inference Optimization Engineer (local / edge runtime) · 4 Locations
- Advanced Packaging Singulation Engineer · US, New Mexico, Albuquerque
- DDR PHY Firmware Engineer · Mexico, Guadalajara
- Lab Engineering Technician · US, Oregon, Hillsboro
- RTL Design Engineer · 3 Locations
- Yield Defect Metrology Technician · Malaysia, Penang
- Senior Software Development Engineer · Malaysia, Penang
- Software Development Engineer · Malaysia, Penang
- SoC/IP Design Verification Engineer · 2 Locations
- Signal Integrity Engineer · US, Oregon, Hillsboro
- DFT Engineer · Bengaluru, Karnataka, India
- Debug Engineer · 2 Locations
- Yield Development Engineer · USA
- Graduate Talent (CPU Design Verification) · Malaysia, Penang
- WPM C4 IR Module Engineer · Leixlip, County Kildare, Ireland
- Semiconductor Manufacturing Engineer (Segment Lead) (Contract) · Malaysia, Kulim
- Director - Intel Foundry Pre-Silicon Design Quality and Reliability · 2 Locations
- AI Software Solutions Engineer · PRC, Shanghai
- Materials Program Manager - Oregon Spares · US, Oregon, Hillsboro
- Materials Program Manager – Direct Materials · 3 Locations
- Senior CPU Physical Design Engineer · US, Texas, Austin
- Director – PDK Architecture · 4 Locations
- Module Development Engineer · US, Oregon, Hillsboro
- Senior SoC Design Verification Engineer · 2 Locations
- Tool Install Structural Engineer · US, Oregon, Hillsboro
- Substrate Supplier Enablement Engineer · South Korea, Seoul
- AI Compiler and Library Engineer · PRC, Shanghai
- IP Development Engineer · US, Texas, Austin
- Backend STA Engineer · Israel, Haifa
- Analog Design Architect · India, Bangalore
- SoC Design Engineering Manager · India, Bangalore
- Sr. Logic Design Engineer · 3 Locations
- Tool Install Area Coordinator · US, New Mexico, Albuquerque
- Intel Foundry LTD Yield Development Engineer ↗ · Hillsboro, OR, US
- ASIC and Custom Silicon Sales Account Manager for PRC · 3 Locations
- Logistics Operations Manager · Leixlip, County Kildare, Ireland
- Industrial Engineer - Foundry Quality and Reliability Labs ↗ · Hillsboro, OR, US
- Facilities Chemical/Gas System Engineer ↗ · Albuquerque, NM, US
- Module Engineering - Day Shift 5 or 7 · US, Arizona, Phoenix
- New Mexico Manufacturing Technician Internship · US, New Mexico, Albuquerque
- SAP IT System Analyst – Requisition to Order (R2O) · India, Bangalore
- LTD Product Development Engineer · US, Oregon, Hillsboro
- Graduate Talent (RF Test Product Development Engineer) · Malaysia, Penang
- Substrates HVM Engineer · Virtual China
- Requisition to Order (R2O) – Technology Product Owner · India, Bangalore
- Consumer Client Partner Marketing Strategy Manager · US, Texas, Austin
- Team Cisco Sales Account Manager · US, California, Santa Clara
- Sales Application Engineer · 3 Locations
- SoC Logic Design Engineer · 3 Locations
- RF Test Development Engineer · USA
- Static Timing Analysis Engineer · India, Bangalore
- Product Failure Analysis Engineer · US, Oregon, Hillsboro
- Defect equipment Systems Engineer · Ireland, Leixlip
- Director, Global Network Operations · US, Arizona, Phoenix
- Manufacturing Quality and Reliability Engineer · Malaysia, Penang
- ECG Business Development Manager · Malaysia, Penang
- Dry Etch module development engineer · US, Oregon, Hillsboro
- CPU Pre-Silicon Verification Engineer · US, California, Folsom
- Foundry Product Engineer · South Korea, Seoul
- Design Verification Student Worker · Mexico, Guadalajara
- Senior Testchip SoC Physical Design Engineer (Integration & Methodology) · 3 Locations
- Optical Sub-System Architect – Principal Engineer · Israel, Haifa
- Infrastructure and DevOps Engineer · Bengaluru, Karnataka, India
- ATD MIHL Equipment Development Engineer · US, Arizona, Phoenix
- Software Engineer · 2 Locations
- Senior Thin Films Engineer · 2 Locations
- Advanced Packaging Technology Development Process Integration Engineer · US, New Mexico, Albuquerque
- MBA Internship – Ecosystem Development Specialist · 3 Locations
- Ethernet Customer Program Manager · 2 Locations
- Process Integration and Yield Technician ( Contract ) · Malaysia, Penang
- Advanced Packaging Process Integration Engineer · US, New Mexico, Albuquerque
- Product Quality and Reliability Engineer · India, Bangalore
- Business Development Specialist · Taiwan, Taipei
- Mechanical Design Engineer · India, Bangalore
- SOC Physical Design Static Timing Analysis Engineer · 2 Locations
- Senior Pre-Silicon Verification Engineer · Virtual Canada
- ASIC and Custom Silicon Sales Account Manager for Asia Pacific & Japan (APJ) · 2 Locations
- Sales Engineer ↗ · Remote, US
- Ocotillo Technology Fabrication Wet Etch Module Engineer · US, Arizona, Phoenix
- Server Quality and Reliability Intern · Costa Rica, San Jose
- Physical Design Intern · Vietnam, Ho_Chi_Minh_City
- Senior Program Managers · Japan, Tokyo
- Engineering Compute Operations Engineer · India, Bangalore
- STA (Static Timing Analysis) Design Intern · Vietnam, Ho_Chi_Minh_City
- Ocotillo Technology Fabrication Production Line Coordinator · US, Arizona, Phoenix
- Director of Data Governance and Operations · 3 Locations
- Product Quality Engineer · Vietnam, Ho_Chi_Minh_City
- Firmware Solutions Engineer · US, Oregon, Hillsboro
- Sales Account Manager - Team Oracle · 2 Locations
- AI Framework Engineer · Poland, Gdansk
- Substrates Quality and Reliability Engineer · 3 Locations
- Assembly Media and Collaterals Development Engineer · Malaysia, Kulim
- Experienced IP Logic Design Engineer · Costa Rica, San Jose
- New Mexico WPM Manufacturing Technician Internship · US, New Mexico, Albuquerque
- Senior USB IP Design Verification Engineer · 2 Locations
- Software Technician · US, Arizona, Phoenix
- Manufacturing Operation Manager · Malaysia, Penang
- CUF TD Module Engineer · Malaysia, Kulim
- Software Application Development Engineer · India, Bangalore
- Senior Software Engineer · India, Bangalore
- Principal Engineer - Standard Cell Design · 5 Locations
- Statistician · Malaysia, Kulim
- Senior Module Development Engineer · Malaysia, Kulim
- TD Media and Collaterals Development Engineer · US, Arizona, Phoenix
- Process Integration Development Engineer · US, Oregon, Hillsboro
- Silicon/Electrical Validation Engineer · 2 Locations
- Power Instrumentation Engineer · US, California, Santa Clara
- Senior Power and Performance Engineer · US, California, Santa Clara
- APTM Yield Analysis/Device Engineer · US, New Mexico, Albuquerque
- Supply Chain Engineer (SCE) · 2 Locations
- Senior AI Software Engineer - Neuromorphic Computing · 3 Locations
- Technical Program Manager · India, Bangalore
- ASIC and Custom Silicon Sales Account Manager for EMEA · Virtual United Kingdom
- Senior Analog Layout Design Engineer · India, Bangalore
- Advanced Packaging Reliability Lab Engineer · US, Arizona, Phoenix
- Data Science Student for AI Solutions Group · 2 Locations
- Data Scientist · US, Oregon, Hillsboro
- Senior DSP Algorithm Engineer · Virtual US
- Graduate Talent (CPU-SoC Silicon Design) · 2 Locations
- System Validation Intern (Power and Performance) · Mexico, Guadalajara
- Wafer Sort Module Engineer · US, New Mexico, Albuquerque
- Semiconductor Manufacturing Engineer · Malaysia, Penang
- Enterprise Systems Analyst · 3 Locations
- Senior Verification Engineer · Virtual Canada
- Sr Deep Learning Hardware Engineer · Ireland, Leixlip
- Manufacturing Systems Software Development Engineer · Malaysia, Kulim
- Senior Process Integration Development Engineer · 3 Locations
- Ethernet Hardware Engineer · US, Oregon, Hillsboro
- Information Security Network / Proxy Engineer · US, California, Folsom
- Director, Silicon Design Engineering · 3 Locations
- ASIC and Custom Silicon Sales Account Manager - Americas region · US, California, Santa Clara
- Construction Tool Install Engineer · Ireland, Leixlip
- Account Executive, Detroit + Greater Michigan ↗ · Remote, US
- ASIC and Custom Silicon Sr. Sales Account Manager - Americas region · US, California, Santa Clara
- Segment Manager - Media AI Solutions · 4 Locations
- AI Software Engineering Intern · Poland, Gdansk
- Enterprise Architecture Analytics Lead · 2 Locations
- Datacenter Technical Sales Specialist - Pacific Northwest · Virtual US
- Ocotillo Technology Fabrication Litho Resist Track Module Engineer · US, Arizona, Phoenix
- Design Technology Tool Enablement Engineer · 3 Locations
- Thermal Quality and Reliability Engineer · US, Arizona, Phoenix
- WATD Module Development Engineer · US, Oregon, Hillsboro
- Package Failure Analysis Engineer · US, Arizona, Phoenix
- HR Director, Frontend Technology · 3 Locations
- Power Management Firmware Architect · 2 Locations
- CPU Physical Design Engineer -Technology & Pathfinding · 2 Locations
- Defect Reduction Engineer · Ireland, Leixlip
- Power Management Firmware Development Team lead · Israel, Haifa
- Pre-si Verification Engineer · India, Bangalore
- Ocotillo Technology Fabrication Process Integration and Yield Engineer · US, Arizona, Phoenix
- Electrical Validation Intern · Mexico, Guadalajara
- AI Software Development Engineer · 3 Locations
- CPU DFT Manager · India, Bangalore
- EDA Tools Hardware Engineer · Israel, Haifa
- Advanced Wafer/Package Assembly Development Integrator · US, New Mexico, Albuquerque
- Analog Engineer · 4 Locations
- Software Engineering Leader · 5 Locations
- Information Security Engineer · 2 Locations
- AI Research Engineer/Scientist · US, California, Santa Clara
- Senior AI Software Engineer – Agentic AI System · 3 Locations
- Advanced Packaging Lithography Development Manager · US, Oregon, Hillsboro
- Ocotillo Technology Fabrication Senior Lithography Reticle Engineer · US, Arizona, Phoenix
- Director, Process Engineer – Dry Etch · 2 Locations
- Advanced Packaging Dry Etch Module Development Engineer · US, Oregon, Hillsboro
- EDA Tools Engineer · Malaysia, Penang
- Senior Standard Cell and IP Application Engineer · India, Bangalore
- Assembly Equipment Specialist · Vietnam, Ho_Chi_Minh_City
- Assembly and Test NPI Technical Program Manager · Malaysia, Kulim
- Materials Program Manager (Temporary position) · Guadalajara, Jalisco
- Intel Wi‑Fi Driver Software Developer Student · Israel, Petah-Tikva
- Defect Review Technician · Malaysia, Penang
- E-Core (Atom) CPU Layout Design Engineer · Malaysia, Penang
- Supply Chain Engineer · US, New Mexico, Albuquerque
- Senior Staff EDA Tools Hardware Engineer · Malaysia, Penang
- Automation Software Development Integration Engineer · US, Arizona, Phoenix
- Formal Verification Engineer · India, Bangalore
- Mfg Systems Software Development Engineer · US, Oregon, Hillsboro
- Development Tools Software Intern · Mexico, Guadalajara
- DTCO Data Engineer Intern · US, Texas, Austin
- GPU Software Engineer · PRC, Shanghai
- Software Optimization Engineer – GPU / Hardware-Accelerated Media (FFmpeg / HandBrake / Intel® Quick Sync Video) (f/m/d) · 5 Locations
- F28 Quality and Reliability Student (Systems and AI Automation) · Israel, Kiryat-Gat
- Project Controls Engineer (Contract) · Malaysia, Penang
- SOC AI Power and Performance Validation Undergrad Intern · US, California, Folsom
- Sr. Data Center Facilities Engineer · US, California, Santa Clara
- Info Security DevSecOps Engineer · India, Bangalore
- Security Software Development Engineer · Israel, Haifa
- Yield Development Engineering Manager-Strategic Programs · 2 Locations
- ASIC and Custom Silicon Sales Leader · 4 Locations
- Software Engineering Intern for Debug Tools · Mexico, Guadalajara
- Hybrid FPGA SW developer · India, Bangalore
- Global Operations Supply Chain Engineer - Oregon · US, Oregon, Hillsboro
- Intel Foundry Senior Customer Quality Engineer · Malaysia, Penang
- Senior Staff Collateral Design and DFM Engineer · 3 Locations
- AI Frameworks Engineer · 3 Locations
- AI/ML Technologist · India, Bangalore
- SAP MM/PP Business Systems Analyst · 4 Locations
- Software Development Intern (Automation and AI Enablement) · Mexico, Guadalajara
- Research Technician · US, Oregon, Hillsboro
- Staff Chemical Mechanical Planarization (CMP) Engineer · US, Oregon, Hillsboro
- Staff Process Engineer, Dry Etch · 2 Locations
- High speed PHY System Architect · 2 Locations
- EHS Engineer · Vietnam, Ho_Chi_Minh_City
- Manufacturing Technician ( 1 year contract) · Vietnam, Ho_Chi_Minh_City
- Sr. EDA Tools Engineer - PERC ESD · US, Oregon, Hillsboro
- Test Equipment Specialist · Vietnam, Ho_Chi_Minh_City
- APTM NPI Integration · US, New Mexico, Albuquerque
- Software Development Engineer - Intel Contract Employee · 3 Locations
- Graduate Talent (Firmware Development Engineer) · Malaysia, Penang
- AI Software Engineering Undergraduate Intern · US, Oregon, Hillsboro
- Graduate Talent (Solution Enabling Engineer) · Malaysia, Penang
- Sr. Principal Engineer, AI Systems and Solutions · 3 Locations
- Senior RTL Design Engineer · India, Bangalore
- Software Engineer - Compute Infrastructure and Security · 2 Locations
- Senior Gen AI Software Solutions Engineer · 2 Locations
- Silicon Photonics TD Process/Product Integration Engineer · US, New Mexico, Albuquerque
- Principal Engineer, AI Software Solutions · 2 Locations
- Information Technology Undergraduate Intern · US, Oregon, Hillsboro
- Verification Engineer Senior · US, Texas, Austin
- Data Science and Analytics Intern · 2 Locations
- AI Security Engineering Intern · 2 Locations
- Intel Foundry Yield Development Engineer · 2 Locations
- Principal Engineer, Emulation · US, Texas, Austin
- AI Software Engineer — Agentic Platform · Saudi Arabia, Riyadh
- Software Application Development Engineer - Sales Incentives · India, Bangalore
- Solution Engineer — Agentic Platform · Saudi Arabia, Riyadh
- Machine Learning Engineer Student for AI Solutions Group · Israel, Petah-Tikva
- Senior CPU RTL Design Engineer – Power Management · 2 Locations
- Qubit Control IC Designer · 8 Locations
- System Software Engineering Intern · Poland, Gdansk
- Shift Yield Defect Metrology Engineer · Malaysia, Penang
- AI Product Analyst student for AI Solutions Group · Israel, Haifa
- AI Product Analyst Student for AI Solutions Group (Beer Sheva) · Israel, Kiryat-Gat
- Sales and Operations Planning Business Architect · 3 Locations
- Senior Member of Technical Staff, Thin Films Engineer · 2 Locations
- Middleware Software Engineering Intern · Poland, Gdansk
- Soc Subsystem Architect - AI platform Development · India, Bangalore
- CPU Design Verification Engineer · Malaysia, Penang
- Module Engineering Manager · Malaysia, Penang
- Product Development Engineer (Contract) · Malaysia, Penang
- CPU DFD Validation Engineer · Malaysia, Penang
- Hardware Platform Applications Engineer - Military & Aerospace · 4 Locations
- CPU HVM Functional-Test Verification Engineer · Malaysia, Penang
- Director-Foundry Customer Planning · US, California, Santa Clara
- CPU RTL Design Engineer · 2 Locations
- Supply Chain Business Analyst · India, Bangalore
- Senior Logic Design Verification Engineer · Malaysia, Penang
- AI Software Engineer – Agentic AI System · 3 Locations
- Operations Research Engineer · India, Bangalore
- Module Development Engineer - RF Test · US, Arizona, Phoenix
- AI Research Engineer/Scientist (OpenVINO, NNCF) · Leixlip, County Kildare, Ireland
- E-core CPU Physical Design Engineer · Malaysia, Penang
- Cloud Software Engineer · Poland, Gdansk
- AI Research and Development Engineer (Physical AI) · Virtual Netherlands
- AIG Power Delivery Pathfinding Researcher · US, Oregon, Hillsboro
- Triton Compiler Engineer · Virtual Canada
- Firmware HW Integration Validation Lead · US, Oregon, Hillsboro
- Senior Process Engineer · Ireland, Leixlip
- Senior Technical Lead -Power & BatteryLife · 2 Locations
- Senior Clock Architecture & Design Engineer · 2 Locations
- ASIC, SOC, Foundry market research consultant · US, California, Santa Clara
- SW Solutions Engineer · 2 Locations
- Verification Team Lead for AI SOC · Israel, Petah-Tikva
- Software Research Engineer/Scientist · US, Oregon, Hillsboro
- AI Algorithm Engineer · 3 Locations
- Neuromorphic/AI Research Scientist · US, California, Santa Clara
- APTM Yield Analysis Senior Engineer / Team Leader · 2 Locations
- Market Development Manager · 4 Locations
- Quantum Error Correction Software Engineer · 2 Locations
- Qubit Control Physical Design Engineer · US, Oregon, Hillsboro
- Machine Learning Engineer · 4 Locations
- Software Engineer - Agent Harness · 4 Locations
- Memory Validation Manager · Taiwan, Taipei
- IP RTL Design Engineer · India, Bangalore
- Linux Development Engineer · India, Bangalore
- AI Solutions Financial Analyst · 3 Locations
- Inference Optimization Engineer (local / edge runtime) · 4 Locations
- Business Development Manager · Taiwan, Taipei
- EDA Design Flow Development Engineer · 4 Locations
- Sr. CPU RTL Front End Methodology Engineer · 3 Locations
- Software Engineering Manager · US, California, Santa Clara
- Platform Integration Engineer · India, Bangalore
- Module Equipment Technician (Kỹ Thuật Viên Bảo trì Sửa chữa) · Vietnam, Ho_Chi_Minh_City
- IF Planning Data Enablement Lead (Business System Analyst) · US, Arizona, Phoenix
- AI Developer Evangelist · 3 Locations
- CAD/EDA Tools Automation Engineer · US, Oregon, Hillsboro
- Senior SoC Chiplet Architect · 6 Locations
- Edge AI Software Product Manager · 3 Locations
- Intel Foundry Data Steward/Scientist · 5 Locations
- Senior Staff Analog Circuit Design Engineer - SerDes · Virtual Canada
- Foundry Site Quality Program Manager · US, Arizona, Phoenix
- Senior Analog Design Engineer · 2 Locations
- Senior Product Manager - Server CPU · 3 Locations
- AI Systems and Solutions Engineering Manager · US, California, Santa Clara
- Pre and Post Silicon Validation Engineer · India, Bangalore
- Network Platform Architect · 4 Locations
- Module Development Engineer (Adv Packaging) · US, Oregon, Hillsboro
- Senior EDA Tools Software Engineer · US, California, Santa Clara
- Senior Customer Technical Enablement and Debug Engineer · 2 Locations
- Intel Foundry Advanced Device Development Engineer · Taiwan, Taipei
- Senior CPU RTL Design Engineer · 2 Locations
- Sr. Software Engineering Manager – Infrastructure and Security · Ireland, Leixlip
- Module Process Engineer · Ireland, Leixlip
- Senior Technologist, Hybrid Bonding Module · US, Oregon, Hillsboro
- OTF Failure Analysis Technician - Night Shift · US, Arizona, Phoenix
- Robotics/Physical AI Sales · Japan, Tokyo
- AI Software Validation Intern · Poland, Gdansk
- Applied Machine Learning Engineer (LLMs & RL) · 3 Locations
- AI Framework Software Engineer · PRC, Shanghai
- Developer Technology Engineer · UK
- DevOps & Cloud Infrastructure Engineer · Israel, Haifa
- Experienced Security Software development Engineer · Israel, Haifa
- Graduate Talent (VDI & Media AI Systems Engineering) · Malaysia, Penang
- PM Validation - student position · Israel, Petah-Tikva
- Thermal data Analysis Engineer · US, Arizona, Phoenix
- Director, SoC Design Engineering · 3 Locations
- RTL Design & Verification Engineer – AI · Israel, Haifa
- Power Delivery Engineer · India, Bangalore
- Packaging Thermal Engineer · Taiwan, Hsinchu
- Product Development Engineer · US, Oregon, Hillsboro
- Principal Engineer, Hybrid Bonding Module · US, Oregon, Hillsboro
- Ethernet Product Manager · 2 Locations
- Analog Mixed Signal Design Engineer · Virtual Canada
- Hardware DevOps/AI Engineer Fall 2026 Internship · US, California, Folsom
- Identity Architect · 2 Locations
- Identity Security - PKI Engineer · 2 Locations
- CPU Physical Design Engineer · US, Texas, Austin
- GPU Software Development Engineer · US, California, Folsom
- LTD Frame Automation Software Engineer · US, Oregon, Hillsboro
- CPU Memory Design Engineer · US, Texas, Austin
- Analytics and AI Solution Architect · 4 Locations
- Senior Account Sales Manager · Japan, Tokyo
- System Simulation Module Development Engineer · Virtual Canada
- Physical Design (Backend) Technical Leader · Israel, Petah-Tikva
- Advanced Packaging Materials Supply Chain Engineer · Japan, Tokyo
- Senior System Debug Engineer · India, Bangalore
- AI Software Engineer · Poland, Gdansk
- Senior CPU Pre-Si Verification Engineer · Mexico, Guadalajara
- Load Balancer Network Engineer · 2 Locations
- Graduate Talent (GenAI Software Solutions Engineer) · Malaysia, Penang
- Firmware validation AI intern · PRC, Shanghai
- GenAI Software Solutions Engineer · Malaysia, Penang
- Path Tracing/ML Research Engineer · US, Oregon, Hillsboro
- Quantum Computing Measurement Engineer · US, Oregon, Hillsboro
- Network Security Engineer · US, Arizona, Phoenix
- Software student for validation tools team · Israel, Haifa
- NPU Software Development Internship · Romania, Timisoara
- Robotics Research Intern · Mexico, Guadalajara
- Firewall Network Security Engineer · US, Arizona, Phoenix
- Neuromorphic Applications Researcher- Temporary Position · Mexico, Guadalajara
- Principal Analog Circuit Design Engineer - SerDes · Virtual Canada
- Consumer Industries Solution Lead · 4 Locations
- Physical Verification Engineer · 3 Locations
- Senior Physical Design Integration Engineer · 3 Locations
- EDA Tools Software Engineer · Malaysia, Penang
- AI Frameworks Engineer – GPU Performance for Generative AI (OpenVINO) · South Korea, Seoul
- SoC Design Engineer · US, Texas, Austin
- Yield and Process Control Automation Engineer · US, Arizona, Phoenix
- Atom CPU Layout Design Engineer · Mexico, Guadalajara
- Test Development Engineer · US, Arizona, Phoenix
- Device Engineer · 3 Locations
- Memory Electrical Validation Engineer · US, Oregon, Hillsboro
- Database and Data Loader Engineer - Automation Ops L2 · Malaysia, Kulim
- Senior GenAI Software Solutions Engineer · Malaysia, Penang
- Sr Test Engineer · US, Arizona, Phoenix
- Standard Cell Design Engineer · Malaysia, Penang
- Middleware Development Engineer · 3 Locations
- Sr. Director of Platform Program Management · 4 Locations
- Image Processing Engineer (C++/Linux) · US, California, Santa Clara
- General Manager, Intel Wireless Solutions · 3 Locations
- Deep Learning System Validation Engineer · Israel, Haifa
- Cryptography Software Engineer · Poland, Gdansk
- Senior Applications and Solutions Engineer - Foundry Services · 3 Locations
- Embodied AI Robot System Intern · PRC, Beijing
- Senior AI Algorithm Engineer in oneDNN · 2 Locations
- System Modelling Engineer · India, Bangalore
- Lead Senior Design Engineer – AI SoC Development · 3 Locations
- Principal Engineer: XeSS and Neural Graphics · US, Oregon, Hillsboro
- Senior AI Software Architect - Runtime · 3 Locations
- AI Software Engineer Intern · 3 Locations
- SerDes Circuit Design Engineer · India, Bangalore
- AI Algorithm Research Intern – Neuromorphic Computing · Mexico, Guadalajara
- Applied AI Frameworks Engineer · India, Bangalore
- Wet Etch Cleans Technical Manager · US, Oregon, Hillsboro
- Python Automation Engineer – Pre-Silicon Validation Tools (Intern/Co-op) · Mexico, Guadalajara
- AI Tools Development Intern · Mexico, Guadalajara
- High-Speed SerDes Simulation & Optimization Intern — I/O Next Generation R&D · Mexico, Guadalajara
- Cloud and AI System Intern · PRC, Shanghai
- Security Research Intern · Mexico, Guadalajara
- Senior PCB/CAD Layout Engineer · US, Oregon, Hillsboro
- AI framework vLLM optimization Intern · PRC, Shanghai
- AI Frameworks Engineer - Intern · PRC, Shanghai
- AI Software Engineering Graduate Intern · 2 Locations
- Cloud Application Development Engineer · India, Bangalore
- Sr. Security Architect · 4 Locations
- CPU power Architect · Israel, Haifa
- Standard Cell Library Design Engineer · Malaysia, Penang
- Foveros Direct Pathfinding Integration · 2 Locations
- Senior Linux Kernel Developer · 3 Locations
- Memory Research Scientist · Japan, Tokyo
- Senior Director, AI SOC Design Verification · US, California, Santa Clara
- Senior Standard Cell Library Design Manager · Malaysia, Penang
- Systems Research Engineer/Scientist · US, Oregon, Hillsboro
- Senior VLSI Design Engineer · Israel, Haifa
- AI Performance Library Architect · 2 Locations
- Senior Middleware Development Engineer · 2 Locations
- Package Design Rule Owner (DRO) · US, Arizona, Phoenix
- Chip Design Team Lead - AI SOC · Israel, Petah-Tikva
- Senior CPU Pre-Silicon Verification Engineer · 2 Locations
- GenAI Software Architect · 2 Locations
- Senior Director, Data & Intelligence · US, California, Santa Clara
- ICE Graduate Talent · 2 Locations
- Test Module Development Engineer · US, Arizona, Phoenix
- WLA Yield Analysis Systems Eng · 3 Locations
- Analog and Mixed Signal Design Engineer · 2 Locations
- Principal Engineer – Cloud and Datacenter Software · 3 Locations
- Senior Member of Technical Staff (CMP) Engineer · 2 Locations
- End to End GPU AI Software Architect · 4 Locations
- Director-Analog Design & Infrastructure Design Automation · 4 Locations
- Senior CPU Verification Engineer · 2 Locations
- Semiconductor Foundry Demand Business Strategist · Taiwan, Taipei
- DFT Application Engineer · 3 Locations
- IP Enablement Application Engineer · 3 Locations
- Senior Formal Verification Engineer – AI SoC Development · 4 Locations
- Senior Data Scientist (Quality Systems) · US, Arizona, Phoenix
- ASIC/FPGA Design Engineer · Malaysia, Penang
- Principal Engineer, Physical Design · India, Bangalore
- Lead Analog SerDes Architect/Design Engineer · US, California, Santa Clara
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