LVS Runset Development Engineer
Core
Develop and validate LVS rule decks and verification flows to ensure design compliance for Intel's semiconductor processes.
Role type
LVS Runset Development Engineer
Builds
LVS/extraction runsets and verification flows for IC design
Domain
Semiconductor manufacturing / EDA
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
LVS runset development, SVRF/TVF standards, EDA tool integration (ICV/Calibre/Pegasus), Python/Tcl/Perl scripting, Linux, debugging complex layout issues
Preferred skills
Advanced technology node experience, AI/ML basics
Technologies
ICV, Calibre, Pegasus, Python, Tcl, Perl, Linux
Responsibilities
Develop and QA LVS/extraction runsets; Optimize verification flows across multiple EDA tools; Debug LVS issues for design teams; Automate execution and reporting via scripts; Create guidelines for correct-by-construction layouts
Seniority
Senior, hands-on IC
