Power Delivery Integration and Power Rail Stress Engineer- SoC Power Thermal Performance Validation Engineer (Temporary position)
Core
Develop and execute SoC-level power delivery, Power Rail Stress (PRS), and validation methodologies to ensure optimal power, thermal, and performance benchmarks for Intel products.
Role type
SoC Power Thermal Performance Validation Engineer
Builds
Intel SoC products
Domain
Semiconductor / SoC Power & Thermal
Required skills
SoC power validation, Power Rail Stress (PRS), ICCmax, di/dt, Vmin/Vmax, DLVR/FIVR, PDN design/verification, IR-drop/EM sign-off, SoC debugging, data logger configuration, validation infrastructure development
Preferred skills
Master's degree, JTAG debugging, Power Delivery Integrity (PDI) validation, Python programming, Oscilloscope/Logic analyzer usage
Technologies
JTAG, Python, Oscilloscope, Logic analyzer, Data loggers
Responsibilities
Develop and execute SoC-level power delivery and Power Rail Stress plans; Collaborate with architecture, design, and firmware teams to define power gating solutions; Perform SoC-level debug to resolve power, thermal, and performance failures; Configure data loggers to collect and analyze power/thermal data; Develop and maintain validation infrastructure; Produce comprehensive validation reports.
Seniority
Mid-level, hands-on IC
