SoC Logic Design Engineer
Core
Design and implement logic for SoC blocks and subsystems using RTL coding, integrating IP blocks into full chip designs to meet power, performance, area, and timing goals.
Role type
SoC Logic Design Engineer
Builds
System-on-chip (SoC) designs for Intel Data Center Group
Domain
Semiconductor / SoC Design
Required skills
RTL coding (Verilog/VHDL), IP integration, timing analysis, power/performance/area optimization, static timing tools, quality assurance standards
Preferred skills
Cross-functional collaboration, academic/industry SoC project experience, problem-solving
Technologies
Synopsys Design Compiler, Cadence Xcelium
Responsibilities
Design and implement logic for SoC blocks and subsystems using RTL coding techniques; Integrate IP blocks and subsystems into full chip SoC designs; Conduct quality checks across logic design aspects; Optimize logic designs to meet PPA targets; Review verification plans and resolve failing RTL tests; Collaborate with IP providers to integrate and validate IPs; Follow secure development practices
Seniority
Entry-level (0-1 years experience or Master's degree)
