CareerPlan

SoC Design Verification Engineer

US, California, Santa ClaraFull-time$106k–$149k2026-11-09 → 2026-11-10
On-site · United States

Core

Perform functional logic verification of Intel's next-generation Xeon server SoCs to ensure accuracy, reliability, and performance for global data center markets.

Role type

SoC Design Verification Engineer

Builds

Intel Xeon server SoCs for data centers, cloud computing, and AI workloads

Domain

Semiconductor / Server SoC Design

Required skills

UVM/SystemVerilog, constrained random verification, emulation models, RTL debugging, cache coherency protocols, scripting for automation

Preferred skills

Complex IP verification, complete verification lifecycle management, Xeon CPU pre-silicon validation, post-silicon validation integration

Technologies

UVM, SystemVerilog, OVM, Emulation platforms, Scripting languages

Responsibilities

Develop scalable verification plans and test benches for block, subsystem, and SoC levels; Execute verification using emulation and simulation to evaluate power, performance, and functionality; Debug and resolve issues in pre-silicon environments; Collaborate with architects and RTL developers to improve verification processes; Incorporate security test coverage into verification environments; Optimize functional verification methodologies and integrate post-silicon learnings.

Seniority

Entry-level (0-1 years experience) or Master's degree with no prior experience