Analog Circuit Design Engineer
Core
Lead the design and development of advanced analog and mixed-signal circuits for high-speed chip-to-chip and package-to-package connectivity.
Role type
Senior IC analog circuit design engineer (high-speed IO)
Builds
High-speed TX/RX circuits, SerDes blocks, PLLs/DLLs/CDRs, clocking circuits, equalization, and signal conditioning for Intel's next-gen products.
Domain
Semiconductor / High-speed analog/mixed-signal IC design
Deliverable
production ML models | product features
Required skills
Transistor-level circuit design, high-speed IO architectures, silicon debug, SerDes, PLL/DLL/CDR, clock distribution, reference/bias circuits, LDOs, ESD protection, PVT corner analysis, Monte Carlo simulations, post-layout verification, signal integrity modeling, advanced process nodes (FinFET/GAA), scripting (Python/Perl/TCL/SKILL)
Preferred skills
Experience with PCIe, DDR, USB, Ethernet, MIPI, DP, eDP, HDMI, UCIe interfaces
Technologies
Cadence Virtuoso, Spectre
Responsibilities
Lead design, analysis, and optimization of analog/mixed-signal circuits; drive architecture and circuit implementation for high-speed interfaces; perform transistor-level design, simulation, and verification; drive design closure for performance metrics; collaborate with physical design teams on layout reviews; support silicon bring-up and characterization; mentor junior engineers; drive technical reviews.
Seniority
Senior, hands-on IC