Silicon Package Design Engineer
Core
Develop physical layout designs for silicon packages, assembly test chips, and EMIB technologies, optimizing signal integrity and power delivery.
Role type
Silicon Package Design Engineer
Builds
Advanced silicon packaging solutions (substrates, EMIB)
Domain
Semiconductor / Hardware Design
Deliverable
product features
Required skills
Silicon packaging design, EDA tools (Cadence, Siemens), Python/Perl/Linux/SKILL, electrical field theories, DRC, electromigration analysis
Preferred skills
Customer-oriented mindset, attention to detail
Technologies
Cadence, Siemens, Python, Perl, Linux, SKILL
Responsibilities
Develop physical layout designs for silicon packages and EMIB; Create bump patterns and placements; Perform signal routing planning and power grid placement; Conduct layout verification (routing checks, connectivity validation, DRC, electromigration analysis); Collaborate with customers and electrical engineers to optimize signal integrity and power delivery; Document design processes.
Seniority
Mid-level (1-6 years experience) or Entry-level (Master's degree)
