Senior AI Systems Architect/Researcher
Core
Define next-generation networking silicon and platform architecture for hyperscale AI workloads, translating communication and memory bottlenecks into IP and platform direction.
Role type
Senior AI systems architect/researcher (networking & interconnect)
Builds
IPU/DPU platforms, advanced packet processing, programmable networking, and data-movement technologies for distributed AI systems
Domain
Hyperscale data centers, cloud infrastructure, AI workloads, networking silicon
Deliverable
production ML models
Required skills
AI training/inference system architecture, hardware-software co-design, computer architecture (networking/interconnect/memory), C/C++ and Python, systems thinking, workload analysis, memory hierarchy optimization
Preferred skills
Memory wall analysis, high-performance networking (RDMA/RoCE/InfiniBand), IPU/DPU/SmartNIC SoC design, PCIe/CXL semantics, cross-team technical leadership
Technologies
vLLM, SGLang, RDMA, RoCE, InfiniBand, PCIe, CXL, IPU, DPU, NIC, SoC, xPU
Responsibilities
Analyze AI workloads to identify bottlenecks and translate into new IP; Drive hardware-software co-design across compute, DPU/IPU, NIC, and AI runtimes; Define architectural direction for data movement across xPU-to-xPU and cross-node paths; Investigate memory wall bottlenecks in large-scale AI and Agentic inference; Shape multi-generation compute, memory, and interconnect roadmaps
Seniority
Senior, hands-on IC with strategic influence
