Quantum Packaging Signal/Power Integrity (SI/PI) Engineer
Core
Modeling and simulation of quantum packaging solutions including redistribution layers, IC substrates, and silicon testchip routing to ensure system-level design requirements are met for silicon-based quantum processors.
Role type
Senior IC signal/power integrity engineer (quantum packaging)
Builds
Scalable silicon quantum dot processors and packaging hardware
Domain
Semiconductor manufacturing / Quantum computing
Deliverable
production ML models | product features
Required skills
SI/PI modeling and simulation, IC substrate design, system-level simulation, simulation software proficiency (SIwave, HFSS, ADS), large form factor IC substrate design
Preferred skills
Testchip SI software automation (RaptorH/X)
Technologies
SIwave, HFSS, ADS, RaptorH/X
Responsibilities
Model and simulate packaging hardware (RDLs, interposers, substrates), collaborate with theory and hardware teams to define requirements, perform end-to-end system-level simulations, deliver design milestones, create technical documentation and presentations, stay current on packaging technology trends
Seniority
Senior, hands-on IC
