CareerPlan

Silicon Packaging Design Architect

US, Arizona, PhoenixFull-time$164k–$312k2026-10-06 → 2026-11-10
On-site · United StatesUnited States citizens onlySecurity clearance required

Core

Design end-to-end silicon package solutions meeting physical, electrical, thermal, and cost requirements for Intel's advanced packaging technologies.

Role type

Senior Silicon Packaging Design Architect

Builds

Advanced silicon packages and 3D IC designs

Domain

Semiconductor manufacturing / Advanced packaging

Required skills

Semiconductor fabrication, chip assembly, packaging design, electromagnetic simulation, PCB layout, assembly processes, test methodologies, technology tradeoffs, EDA tools, cross-functional collaboration

Preferred skills

TS/SCI security clearance, 10+ years in package/PCB/IC design, cost optimization, complex issue resolution, multidisciplinary team leadership

Technologies

Mentor, Cadence, SPICE, Ansys, Allegro, Xpedition, Hyperlynx, Sigrity, Concept HDL, APD/SiP

Responsibilities

Translate product requirements into package architecture specifications; drive technology tradeoff decisions for electrical/mechanical/thermal/reliability standards; oversee end-to-end package development; troubleshoot designs and resolve material/process issues; implement co-design strategies between silicon and board teams; collaborate with EDA partners to advance design tools.

Seniority

Senior, hands-on IC