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Senior Photonic-Integrated-Circuit Integration Engineer

US, California, Santa Clara💼 Full-time💰 $190,610–$311,890🗓 2026-08-14 → 2026-09-25

Core

Architect, design, and optimize complex active and passive silicon photonic integrated circuits (PICs) for AI datacenter scale-up, laser sources, and pluggable/NPO/CPO/OCI solutions.

Role type

Senior IC silicon photonics integration engineer

Builds

High-performance silicon photonic chips for datacenter and optical interconnect applications

Domain

Semiconductor / Silicon Photonics / Datacenter Infrastructure

Deliverable

production ML models | product features

Required skills

Silicon photonic integrated circuit (PIC) design and optimization, link budget analysis, electrical power budgets, back-reflection budgets, Monte Carlo modeling, tape-out leadership, optical system simulation (Lumerical, RSoft, Tidy3D), layout tools (Cadence, KLayout, Synopsys Optocompiler), GDSII generation

Preferred skills

Statistical analysis (JMP, MATLAB, Python), photonic test methodologies (OSA, tunable lasers, OBR, OVA), EDA/PDA methodologies, LVS/SDL/DRC verification, fiber/free-space coupling expertise

Technologies

Lumerical Interconnect, ADS, Lumerical FDTD/MODE/DEVICE, RSoft, Tidy3D, Harold, Photon Design, MATLAB, Python, JMP, Cadence, KLayout, Synopsys Optocompiler, GDSFactory

Responsibilities

Architect and optimize complex active and passive silicon photonic integrated circuits; Develop and execute plans for chip design, layout, tape out, test, validation, and performance debug; Conduct data analysis, reliability, qualification, and delivery of known-good-die solutions; Design and simulate photonic integrated circuit systems using advanced modeling tools; Drive high-volume manufacturing (HVM) enabling flows and ensure seamless integration of photonic technologies; Develop technical documentation and test content to support the silicon photonics chip lifecycle

Seniority

Senior, hands-on IC

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