CareerPlan

AI Silicon Performance Modeling and Analysis Engineer

US, California, Santa ClaraFull-time2026-10-31 → 2026-11-09

Core

Develop and maintain performance models for next-generation AI silicon products to enable architecture exploration, design evaluation, scalability analysis, and performance projection.

Role type

Senior IC AI silicon performance modeling and analysis engineer

Builds

Performance models for AI SoC communication fabrics, memory subsystems, and scale-up/scale-out interconnects

Domain

AI hardware / Semiconductor / Computer Architecture

Deliverable

production ML models

Required skills

SystemC/TLM modeling, C++ development, Python for data analysis, SoC architecture knowledge, memory subsystem expertise, performance characterization, architectural tradeoff analysis, validation strategy design, root-cause analysis, data visualization

Preferred skills

Experience with large-scale performance data generation, automated workflow development, technical mentoring

Technologies

SystemC, TLM, C++, Python

Responsibilities

Implement new architectural features in performance models; improve model fidelity and simulation performance; debug model issues and anomalies; develop validation plans and regression suites; correlate modeled behavior with hardware measurements; design and execute performance studies across various workloads; analyze bandwidth, latency, and congestion; identify performance bottlenecks; develop performance dashboards and visualization tools; partner with architecture and silicon design teams to influence product decisions; drive improvements in modeling methodologies and automation workflows.

Seniority

Senior, hands-on IC