CareerPlan

Microarchitecture and Design Engineer - AI SoC

US, California, Santa ClaraFull-time$164k–$312k2026-10-01 → 2026-11-10
On-site

Core

Design and develop next-generation AI SoC products, focusing on logic design, RTL coding, simulation, and microarchitecture features for logic blocks.

Role type

Senior IC microarchitecture and design engineer (AI SoC)

Builds

AI SoC chips for edge devices and data center accelerators

Domain

Semiconductor / AI Hardware

Deliverable

production ML models

Required skills

RTL design and coding (SystemVerilog), microarchitecture definition, timing/power/area optimization, system-level design principles, IP integration and validation, verification planning, secure development practices

Preferred skills

SoC architecture expertise, clock domain crossing analysis, quality assurance in logic design

Technologies

SystemVerilog, timing/power convergence tools

Responsibilities

Develop logic design, RTL coding, and simulation for SoC designs; Define and implement architecture and microarchitecture features for logic blocks; Perform quality checks across RTL, timing, power, and design integrity; Optimize RTL logic to meet PPA targets; Collaborate with IP providers to integrate and validate IPs; Review and contribute to verification plans; Identify and resolve RTL test failures; Employ secure development practices; Drive quality assurance compliance for IP and SoC handoff

Seniority

Senior, hands-on IC