TD Memory Quality and Reliability Engineer
Core
Drive post-silicon memory characterization, certification, and technology readiness for advanced SRAM, Register File, and fuse arrays.
Role type
Senior IC memory quality and reliability engineer
Builds
Silicon-based Vccmin/Vmax predictive models, certification methodologies, and risk assessments for PDK releases
Domain
Semiconductor manufacturing / Memory technology
Deliverable
production ML models | product features
Required skills
SRAM/RF/Fuse array characterization, statistical analysis (DOE, SPC, regression), JMP, Python, Sil2Sim correlation, Vmin/Vmax modeling, root-cause analysis
Preferred skills
Memory design fundamentals, variability analysis, SPICE modeling, PDK development processes, SQL, JSL
Technologies
JMP, Python, SQL, JSL, SPICE
Responsibilities
Plan and execute memory technology certification; define certification methodologies and test strategies; analyze silicon characterization data to identify performance gaps and risks; develop and validate Vccmin/Vmax predictive models; perform silicon-to-simulation correlation assessments; collaborate with cross-functional teams on root-cause resolution; generate certification reports and risk projections; present technical findings to leadership.
Seniority
Senior, hands-on IC
