Staff EMIB-T Substrate Yield Engineer
Core
Drive supplier yield, defect reduction, and process-control maturity for next-generation EMIB-T substrates across Taiwan suppliers.
Role type
Staff IC substrate yield engineer (advanced packaging)
Builds
Next-generation advanced packaging technologies (EMIB-T) for Intel Foundry Services and Intel Product Groups
Domain
Semiconductor manufacturing / Advanced packaging / Heterogeneous integration
Deliverable
production ML models
Required skills
Statistical and spatial analytics, Failure analysis, SPC, DFM/DFY, Defect metrology, HVM execution, Automated analytics, Image analytics, Computer vision, AI/ML-based defect detection
Preferred skills
Semi-additive processing, Build-up films, Micro vias, Copper plating, Lithography, Lamination, Embedded silicon, TSV, 2.5D/3D packaging, Heterogeneous integration, Automated data pipelines
Technologies
SPC, DFM/DFY, Image analytics, Computer vision, AI/ML
Responsibilities
Own day-to-day yield performance and issue closure for assigned supplier lines, Lead structured investigations from containment to sustainment, Use statistical and spatial analytics to identify signatures, Establish clear supplier actions and verification plans, Support DFM/DFY and qualification, Capture reusable learning and communicate risks