Silicon Domain Architect
Core
Develop and maintain SystemC/TLM-based performance models for next-generation AI silicon products to enable architecture exploration, scalability analysis, and performance projection.
Role type
Senior IC silicon performance modeling and architectural analysis engineer
Builds
Performance models for AI SoC communication fabrics, memory subsystems, and scale-up/scale-out interconnects
Domain
AI hardware / Silicon architecture / Computer architecture
Deliverable
production ML models
Required skills
SystemC, Transaction-Level Modeling (TLM), C++, Python, SoC architecture, Memory subsystem architecture, On-chip communication fabrics, Scale-up and scale-out architectures, Performance bottleneck analysis, Latency and bandwidth characterization, Root-cause analysis
Preferred skills
Experience with AI accelerators, GPUs, or complex hardware systems
Technologies
SystemC, TLM, Python, C++
