Power Delivery Design Engineer
Core
Develop hardware and platform solutions for Intel's next-generation GPUs and AI accelerators, focusing on end-to-end power delivery design, power integrity simulation, and validation.
Role type
Senior IC power delivery design engineer
Builds
Power delivery networks, VRM-to-die PDN models, and platform power conversion solutions for AI compute platforms
Domain
Semiconductor hardware design, AI accelerators, power electronics
Required skills
Low voltage high current multi-phase DC-DC switching regulator design, Power delivery network simulation (Cadence Sigrity, Ansys SIwave), SPICE and time-based simulation (LTSpice, SIMPLIS), PCB stackup and decoupling design, Oscilloscope and DAQ usage, Signal/Power integrity analysis
Preferred skills
Debug and testability design for power delivery, Configurable power delivery for multiple SKUs, GaN power devices and switched capacitor topology knowledge, Project management, High-volume production delivery
Technologies
Cadence Sigrity PowerDC/PowerSI, Ansys SIwave, LTSpice, SIMPLIS, SVID/PMBus/IMON, Kelvin-sense, S-parameter extraction
Responsibilities
Build and correlate VRM-to-die PDN models for DC IR-drop and AC target-impedance analysis, Design and validate platform power conversion and management solutions, Architect observability into the board for debug (per-rail sensing, telemetry), Create and execute test plans to validate power delivery solutions, Conduct failure analysis and root cause investigations for power delivery issues, Collaborate with silicon and platform architects to generate solutions
Seniority
Senior, hands-on IC
