PERC Rule Deck Development Engineer
Core
Develop and validate PERC (Programmable Electrical Rule Checker) rule decks to identify electrical reliability violations in semiconductor designs.
Role type
IC verification engineer (PERC rule development)
Builds
PERC rule decks and verification flows for design compliance
Domain
Semiconductor manufacturing / Process Integration
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
PERC rule development, ESD/latch-up verification, SVRF/TVF format knowledge, Python/Tcl scripting, Linux, debugging complex violations
Preferred skills
Calibre PERC expertise, advanced technology node experience, basic AI concepts
Technologies
Calibre PERC, Cadence Pegasus, Synopsys tools, Python, SKILL, Tcl, Perl
Responsibilities
Develop and maintain complex PERC rule decks for electrical reliability; Optimize verification flows across multiple EDA environments; Collaborate with Device Physicists and Analog Designers to translate reliability requirements; Debug PERC violations to distinguish true risks from false positives; Automate reliability checks using scripts; Document reliability check-sets and design guidelines
Seniority
Senior, hands-on IC
