ADCE Packaging Design Architect
Core
Drives end-to-end substrate design from concept through tape out, implementing physical layout and routing to optimize silicon-package-board performance.
Role type
Senior IC packaging design architect
Builds
Semiconductor packages and substrates
Domain
Semiconductor fabrication and packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
substrate design, physical layout, routing, electromagnetic simulation, DRC analysis, design rule definition, semiconductor fabrication knowledge, PCB design, IC digital design
Preferred skills
assembly process knowledge, test and characterization techniques
Technologies
Cadence Allegro, Mentor Xpedition, SPICE, Ansys, APD/SiP, Concept HDL, Sigrity
Responsibilities
Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs; define substrate design rules and conduct reviews; resolve DRCs to optimize package design; complete documentation in product lifecycle management system
Seniority
Senior, hands-on IC
