CPU DFT Manager
Core
Lead and technically guide a high-performing DFT team focused on X86 CPU DFT design and validation for silicon and platform solutions.
Role type
Senior IC DFT Manager (X86 CPU)
Builds
X86 CPU silicon designs with embedded DFT circuitry and validation
Domain
Semiconductor / CPU Design / Digital Test
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
X86 CPU architecture knowledge, DFT design and verification, JTAG implementation, Memory BIST, Memory Repair (BIRA/BISR), RTL coding, Shell scripting, Spyglass DFT, ATE debugging, hierarchical DFT strategies
Preferred skills
Advanced process node experience, cross-functional collaboration, global stakeholder management
Technologies
Spyglass, RTL, Shell scripting, ATE
Responsibilities
Manage and technically guide a high-performing DFT team; Develop detailed execution plans for parallel activities across multiple projects; Implement JTAG, Memory BIST, and Memory Repair circuitry; Drive DFT verification using RTL simulations and emulation; Debug failures to root cause and learn architecture deeply; Collaborate with post-silicon/manufacturing teams on ATE debugging
Seniority
Senior, hands-on IC with management responsibilities
