Staff SOC DFT Engineer
Core
Develop and implement advanced DFT/DFD methodologies for complex SoC designs to maximize test coverage, debuggability, and post-silicon efficiency.
Role type
Staff DFT Design Engineer (SoC)
Builds
Testable and debuggable semiconductor System-on-Chip (SoC) designs
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features
Required skills
DFT/DFD methodologies, RTL design (Verilog/VHDL/SystemVerilog), SoC design, post-silicon strategy, IEEE standards (1687/1149.1/1500), DFT tools (Synopsys/Mentor/Cadence), Python/scripting
Preferred skills
AI application in DFT, low-power/high-performance SoC design, team management
Technologies
Synopsys DFT Compiler, Mentor Tessent, Cadence Modus, Python, SystemVerilog, Verilog, VHDL
Responsibilities
Develop advanced DFT methodologies for SoC designs; Integrate DFT/DFD features into RTL; Collaborate with design, verification, and manufacturing teams; Debug and validate DFT features post-silicon; Optimize workflows with AI adoption
Seniority
Staff, hands-on IC with strategic influence
