Sort Interface Pathfinding and Development Engineer
Core
Pioneer breakthrough silicon interface probing & test solutions enabling best-in-class die and wafer sort capabilities across leading-edge process nodes and advanced heterogeneous packaging platforms.
Role type
Senior IC hardware development engineer (sort interface & test hardware)
Builds
Electro-mechanical pathfinding, test hardware, Interface Design Kits (IDKs), and probing process qualifications for internal roadmap and external Foundry customers.
Domain
Semiconductor manufacturing, advanced packaging, and test technology
Required skills
Design of Experiments (DOE), electro-mechanical pathfinding, ATE test hardware development, sort interface specifications, PCB/substrate design rules, supplier technical co-design, manufacturing readiness
Preferred skills
Advanced probing process characterization, OSAT/Foundry test operations, multi-client test cell standards, fine-pitch micro-bump qualification, 2.5D/3D architecture probing, commercial ATE platforms (Advantest V93k, Teradyne Ultra-FLEX)
Technologies
EMIB, EMIB-T, Foveros, Foveros Direct, Advantest V93k, Teradyne Ultra-FLEX
Responsibilities
Formulate and execute rigorous Design of Experiments (DOE) to optimize and qualify next-generation probing technologies; Serve as lead technical liaison for Foundry and OSAT customers; Author industry-standard sort design rules and Interface Design Kits (IDKs); Collaborate with customer design and DFT teams to architect test interface hardware; Partner with global Test Solution vendors and PCB suppliers; Direct supplier and pathfinding initiatives to align vendor roadmaps with internal efficiency goals
Seniority
Senior, hands-on IC
