CPU Power Management and Performance Architect
Core
Define and drive power-management architecture for next-generation mobile and desktop client processors, owning end-to-end CPU power and performance requirements within the SoC.
Role type
Senior IC CPU Power and Performance Architect
Builds
Next-generation mobile and desktop client processors (SoCs)
Domain
Semiconductor / CPU Architecture / Power Management
Required skills
SoC or IP architecture, CPU microarchitecture, power and performance engineering, DVFS, clock and power gating, idle-state management, performance/power modeling, workload analysis, system-level design
Preferred skills
Deep design expertise in compute SoCs, system-level leadership, thermal constraints management, firmware and OS interaction knowledge, statistical analysis
Technologies
DVFS, clock gating, power gating, idle states, telemetry, SoC fabric, interconnects, accelerators
Responsibilities
Define architectural capabilities and control mechanisms for CPU power/performance; analyze power budgets and interfaces across CPU cores, caches, and memory; create and maintain workload-based power models; partner with firmware/OS teams on power policies; influence microarchitecture for efficiency; lead cross-functional design reviews and tradeoff decisions.
Seniority
Senior, hands-on IC
