Security Hardware Integration Engineer
Core
Integrate hardware security IP into SoC/dies and define HW security architecture for large-scale data center compute, network, and control infrastructure.
Role type
Senior IC hardware security integration engineer
Builds
AI hardware solutions (silicon/dies) with embedded security features
Domain
Semiconductor hardware design + AI infrastructure security
Deliverable
production ML models | product features
Required skills
RTL development (Verilog/SystemVerilog), SoC design, IP integration, bus protocols (AXI/AHB/NoC), lint/CDC/synthesis flows, Root of Trust, TEEs, secure boot, crypto IP, side-channel mitigations
Preferred skills
fuse/OTP provisioning, supply-chain security, multi-tenant cloud isolation
Technologies
AXI, AHB, NoC, TDX, SGX, SEV
Responsibilities
Integrate third-party and internal HW security IP into the die; Author RTL for security units, glue logic, fuse/OTP interfaces, and bus/fabric connections; Develop integration test benches and support DV/verification; Architect platform Root of Trust, secure boot, attestation, and confidential computing; Threat-model the full stack and define HW mitigations; Drive secure key management and crypto offload
Seniority
Senior, hands-on IC
