Senior Compiler Performance Engineer
Core
Design and optimize LLVM-based compiler technologies (C, C++, SYCL, Triton, MLIR) for Intel CPUs and GPUs to enable high-performance AI and HPC workloads.
Role type
Senior IC compiler performance engineer
Builds
Production-grade compiler optimizations, code generation, and heterogeneous offload support for Intel processor platforms
Domain
Semiconductor / Compiler Infrastructure / HPC & AI
Deliverable
production ML models
Required skills
Modern C++, compiler theory, middle-end optimization, backend code generation, performance analysis, data structures and algorithms
Preferred skills
LLVM infrastructure, MLIR, Intel x86 ISA, GPU architecture, SYCL, OpenMP offload, Triton, CUDA, PyTorch integration, CI/CD at scale
Technologies
LLVM, MLIR, SYCL, Triton, OpenMP, CUDA, PyTorch, C++, C++, Fortran
Responsibilities
Lead performance analysis of real-world AI/HPC workloads; design and productize compiler optimizations; own performance targets for compiler components; advance heterogeneous compilation; collaborate with hardware architecture teams; contribute to upstream open-source communities; mentor junior engineers
Seniority
Senior, hands-on IC
