Senior Compiler Engineer - Triton and DSLs
Core
Design, develop, and optimize AI compiler technologies (Triton, DSLs) for high-performance execution across Intel CPUs, GPUs, and accelerators.
Role type
Senior IC compiler engineer (AI/HPC)
Builds
Compiler infrastructures, optimization passes, code generators, and runtime integration for AI workloads
Domain
AI software, heterogeneous computing, compiler technology
Deliverable
production ML models
Required skills
C++, Python, compiler design (parsing, IR, optimization, code generation), GPU programming models, performance analysis, technical leadership
Preferred skills
LLVM, MLIR, Triton, CUDA, SYCL, OpenMP, HIP, PyTorch, open-source contributions, heterogeneous computing architectures, mentoring
Technologies
LLVM, MLIR, Triton, GCC, Clang, CUDA, SYCL, OpenMP, HIP, PyTorch
Responsibilities
Lead design and implementation of compiler technologies for Triton and DSLs; Drive advanced compiler optimizations and transformations; Own significant components of the compiler stack; Collaborate with hardware architects and AI framework developers; Analyze and resolve complex functional and performance issues; Drive technical discussions and architecture reviews; Mentor junior engineers; Contribute to open-source compiler projects
Seniority
Senior, hands-on IC
