Silicon Design Verification Engineer
Core
Validating complex microarchitectures and SOCs through simulation, emulation, and silicon debugging to ensure design quality.
Role type
Senior IC silicon design verification engineer
Builds
Client SOCs for laptops and desktops
Domain
Semiconductor / Computer Architecture
Required skills
RTL code interpretation, validation plan development, Verilog/SystemVerilog, OVM/UVM, DFT methodologies, silicon debugging, UNIX/Linux, IP integration
Preferred skills
Computer architecture, IA-32 assembly, Coherency protocols, JTAG/BScan standards
Technologies
Verilog, SystemVerilog, OVM, UVM, Scan, SBFT, TAP, Arrays, Fuse, MBIST, UNIX, Linux
Responsibilities
Validate DFx features using simulation and emulation; Create validation plans for complex microarchitectures; Debug failures to root cause; Develop DFT and validation tools; Participate in silicon failure debug; Engage with IP providers for infrastructure; Develop debugging software
Seniority
Senior, hands-on IC
