marvell Jobs

323 open roles · apply directly

CAD Engineer · Ho Chi Minh
Principal Hardware Application Engineer · 2 Locations
Disaster Recovery Management Lead · 2 Locations
Principal Physical Design/Implementation Engineer ↗ · Santa Clara, CA, US
Senior Staff Engineer, Physical Design · Austin, TX
Principal Engineer, Software/Firmware Engineering · Santa Clara, CA
Senior Analog/Mixed Signal CAD Engineer · Santa Clara, CA
Principal Engineer, Foundry Technology · Santa Clara, CA
Analog IC Design Staff Engineer · Westlake Village, CA
Principal Engineer, Software/Firmware/Release Engineering · Santa Clara, CA
Senior Principal Engineer, Digital IC Design · Boise, ID
Principal Engineer, Software / Firmware Engineering · Santa Clara, CA
Principal Professional, Facilities · Santa Clara, CA
Senior Staff Engineer, Design Verification · Westborough, MA
Principal Engineer, Field Application Engineering · Santa Clara, CA
Senior Engineer, Design Verification · Morrisville, NC
Principal Engineer, Design Verification · Ho Chi Minh
Senior Principal Engineer – Hardware Chip Lead, Connectivity BU · Santa Clara, CA
Design Verification (Staff to Senior Staff Engineer) · Ho Chi Minh
Engineering IP Program Manager, Sr. Staff · 2 Locations
Full-Chip Senior Principal Physical Design Engineer · 2 Locations
Distinguished Engineer (Chiplet Lead - Photonic Fabric) · Santa Clara, CA
Senior Desktop Support Engineer デスクトップサポートエンジニア · Tokyo
Hardware Board Design Senior Staff Engineer · Yokneam
Principal/ Senior Principal STA Full Chip Expert · Bangalore
Sr. Staff Validation Engineer · Santa Clara, CA
IP Physical Design Engineer · 2 Locations
Full-Chip Principal Physical Design Engineer · 2 Locations
Senior Engineer, DFT · Ho Chi Minh
Customer Quality, Staff Engineer · Santa Clara, CA
Program Management Intern · Cordoba, Argentina
Senior Staff Test Engineer
Senior Design Verification engineer · 2 Locations
Design Verification Infrastructure Sr. Staff Engineer · Santa Clara, CA
Hardware & Silicon Validation, Senior Staff Engineer · TW - Hsinchu
Sr. Principal Program Manager (Hyperscaler Cloud Data Center - full lifecycle program ownership) · 3 Locations
Principal Technical Engineer 3rd Party IP Engineer · 6 Locations
Senior Staff Engineer Digital IC Build Flow and Methodology · 3 Locations
Hardware & Silicon Validation Principal Engineer · Santa Clara, CA
Principal, Product Quality Engineer · Santa Clara, CA
Principal Signal/Power integrity Engineer · Yokneam
Senior Staff Professional / Master Planner · Santa Clara, CA
Senior Staff Manager for Procurement · Santa Clara, CA
Senior Hardware Program Management Engineer · Hsinchu City
Principal Validation Engineer · 2 Locations
Director, BU Planning · Santa Clara, CA
Advanced Packaging SI/PI Senior Engineer · 2 Locations
Principal IC Digital Design - SoC Design/Micro-architecture · Santa Clara, CA
Senior Staff Design Verification Engineer · Toronto, Ontario, Canada
Staff Engineer, Design Verification · Morrisville, NC
Optical Communication Systems, Senior Staff Engineer · CH - Adliswil
PIC Process & Integration Engineer · CH - Adliswil
Senior Principal Design Verification Engineer · Bangalore
Sr. Staff Test Development Engineer · Irvine, CA
Senior Staff Engineer, Digital IC Design · Morrisville, NC
Director, SOC Design · 2 Locations
Senior Principal Engineer, Design Verification · Morrisville, NC
Principal Design Engineer · Bangalore
Principal Emulation Engineer · Santa Clara, CA
Senior Principal Test Engineer · Irvine, CA
Senior Staff Physical Verification CAD engineer · US-TX - Austin
Hardware & Silicon Validation Senior Staff Engineer · Santa Clara, CA
Prinicpal Design Verification Engineer · Bangalore
Senior Staff Engineer Design Verification · Bangalore
Senior Staff Engineer Design · Bangalore
Optical Module Hardware Sr. staff Field Application Engineering · Shanghai
Principal Analog/Mixed-Signal CAD Engineer · Irvine, CA
Senior Staff Design Engineer · Santa Clara, CA
Staff Applications Engineering - Network Validation · Santa Clara, CA
Principal ASIC Design Engineer · Ottawa, Canada
Sr. Staff, Hardware Design Engineer · Santa Clara, CA
Layout Intern - Master's Degree · Bangalore
Chip Lead · Bangalore
Design Verification Senior Staff Engineer · 2 Locations
FP&A Systems Principal Professional / Solution Architect · 2 Locations
Senior Staff Engineer, Firmware Engineering · Santa Clara, CA
Principal Engineer, Hardware & Silicon Validation · 2 Locations
Staff Engineer, Physical Design · Hyderabad
Timing & Power Analysis CAD Engineer · Bangalore
Lab Technician Senior Engineer · Santa Clara, CA
Staff Engineer (L1, L2, L3 Testing, NOS/SDK testing, Python Automation) · Bengaluru, Karnataka, India
Advanced Packaging Design Engineer · 2 Locations
Advanced Packaging SI/PI Senior Staff Engineer · Burlington, VT
Memory Layout Staff Engineer · Bangalore
Site HR Manager · Hyderabad
Director, Design Verification · Santa Clara, CA
Staff CAD Engineer (Power Signal Integrity) · Bangalore
Sr. Staff Verification Engineer · Santa Clara, CA
Principal, Design Verification Engineer, Secure Root of Trust · Santa Clara, CA
Physical Design Engineer · Bucharest, Romania
Senior Staff Engineer, DFT · Bangalore
Senior Staff Program Manager · Santa Clara, CA
Senior Staff Physical Design Engineer · Bucharest, Romania
Principal Product Engineer – Networking & Connectivity · Santa Clara, CA
Senior Principal Engineer, Physical Design · Bucharest, Romania
Staff Physical Verification CAD engineer · Bangalore
Senior Staff Engineer, Design For Test - Automation & Infrastructure · Ottawa, Ontario, Canada
Senior Staff System & Modeling Engineer – Wireline Communications · Toronto, Ontario, Canada
Director Customer Support - US Customer Solutions Group · Santa Clara, CA
Staff Application Engineer — HDD SoC · Santa Clara, CA
Sr Staff Firmware Engineer · Pune
Senior Principal Software Applications Engineer · Santa Clara, CA
Senior Manager, DFT · Bangalore
Design Verification (Senior to Senior Staff Engineer) · Ho Chi Minh
Engineer, Design Verification · Pune
Systems Application Engineer - Early Career · Santa Clara, CA
Senior Staff, Hardware Design - PCB Boards for Chip Validation · Santa Clara, CA
Digital IC Design Engineer · Cordoba, Argentina
Silicon Photonics Intern - PhD (Fall 2026 Start Date) · Ottawa, Canada
Senior Staff Design Verification Engineer – PCIE/CXL Sub-System · 2 Locations
Analog IC Design Engineer, Senior Staff Engineer · Singapore
Principal Engineer, Subsystem CoE Emulation · Bangalore
Senior Staff CAD Engineer, Multi-die 3DIC & Power · Santa Clara, CA
Sr. Staff RTL Design Engineer - PCIe · Bangalore
Sr Staff Analog Layout Engineer · San Diego, CA
Director, Service Provider & Carrier Sales · Remote - US - CA
Principal Analog Layout Engineer · San Diego, CA
Director of Sales - Account Management · Santa Clara, CA
Senior Staff Analog and Mixed Signal Engineer · Westlake Village, CA
Software/Firmware Engineer · Ho Chi Minh
Principal Optical Engineer · Singapore
Principal, IC Digital Design Engineer · Irvine, CA
Digital IC Design Engineer - Early Career · Westborough, MA
Senior Staff Applications Engineer · Santa Clara, CA
Senior Principal Software/Firmware Engineer - Optical PHY · Santa Clara, CA
Staff Firmware Engineer - memory constrained embedded system development/data center interconnectivity · Ottawa, Canada
(Sr.) Staff Engineer, Analog IC Design · Hsinchu City
Senior Staff Analog and Mixed-Signal IC Design Engineer · Irvine, CA
Staff DFT Engineer · Santa Clara, CA
Sr. Staff, Software Engineer · Santa Clara, CA
Staff Engineer- PCIe Driver/ Linux Kernel Driver Development · Hyderabad
Staff Software Engineer · Santa Clara, CA
Sr. Staff Software/Firmware Engineer - MCU development · Santa Clara, CA
Sr. Principal Engineer, RTL ASIC Design · Hyderabad
Staff Product Engineer · Singapore
Test Engineer (Early Career) · Singapore
Principal Application Engineer · Santa Clara, CA
Principal Engineer, Physical Design · Hsinchu City
ASIC Architect · Santa Clara, CA
Sr. Staff Engineer, Packaging Engineering · Hsinchu City
Staff Design Verification Engineer, UAL and PCIe Subsystems · Santa Clara, CA
Senior Staff ASIC CAD Flow Infrastructure Engineer · Austin, TX
Sr. Director, Product & Technology Marketing— Optical & Data Center Systems · 2 Locations
Analog IC Design Intern - Master's Degree · Hsinchu City
Principal Engineer (L2, L3 Protocol Development, Switching/Routing) · Bangalore
Emulation Lead, Senior Principal Engineer · Santa Clara, CA
Sr. Director, Product & Technology Marketing— Custom Cloud & XPU Solutions · 2 Locations
Senior Staff Testing Engineer · Westlake Village, CA
Principal Analog Design Engineer · Bangalore
Architecture ASIC Engineer · Cordoba, Argentina
Director/Senior Account Manager – Strategic Accounts Sales · Bangalore
Senior Principal Engineer Analog Design (HBM PHY) · Bangalore
Silicon Photonics Design, Principal Engineer · CH - Adliswil
Silicon Photonic Design Engineer · CH - Adliswil
Trade Compliance Analyst · 3 Locations
Analog Layout Engineer · Cordoba, Argentina
Electro-optical Signal Integrity, Principal Engineer · CH - Adliswil
Supply Chain Program Manager · Santa Clara, CA
Senior Staff Analog Mixed-Signal Design Engineer · Santa Clara, CA
Staff Analog Design Engineer · Bangalore
Senior Staff- IP RTL Design Engineer · Bangalore
Senior SW Embedded Engineer · Petah-Tikva
Head of Physical Security · Santa Clara, CA
Optical Systems Engineer – Data Center Hardware · Santa Clara, CA
Sr. Talent Advisor · Pavia, Italy
M&A Project Manager · 2 Locations
Sr. Director, Product & Technology Marketing— Connectivity Components & Ecosystem · 2 Locations
Senior Staff Digital Design Engineer · Irvine, CA
Staff/ Senior Staff QA Engineer (C, C++, Python, CXL, PCIE) · Hyderabad
Regional EHS Manager - AMEC · 2 Locations
Senior Staff Optical Validation Engineer · Santa Clara, CA
Staff Applications Engineer · Santa Clara, CA
Staff/Senior Staff Software Development Engineer (C/C++, Network Drivers, Data plane, Crypto, Compiler) · Bangalore
Senior Staff Verification Engineer · Santa Clara, CA
IP Release Principal Engineer · 2 Locations
Senior Staff Manager, Test Engineering · Singapore
Staff Digital IC Design Engineer · Ottawa, Canada
Principal Test Development Engineer (ATE) · Santa Clara, CA
Staff Data Science Engineer - Hardware & Silicon Validation · Santa Clara, CA
Senior Staff Engineer, Hardware & Silicon Validation · Ho Chi Minh
Senior Sales Account Manager · Santa Clara, CA
Senior Staff Design Engineer - PCIE/CXL Subsystem COE · Irvine, CA
Principal Board Product Engineer · 2 Locations
Firmware Engineer · Pavia, Italy
Associate Vice President, Chief of Staff & Business Operations, Connectivity · Santa Clara, CA
Director · Hyderabad
Principal Technical Manager · 2 Locations
Senior Staff Application Engineer · Pavia, Italy
Windows Device Driver Developer ( C, Kernel Programming, Storage protocols ) · Pune
Senior Workplace Specialist · San Diego, CA
Senior Staff ESD Compliance Engineer · Hsinchu City
ASIC Architecture Intern · Petah-Tikva
Sr. Staff Test Engineering Manager · Santa Clara, CA
Package Integration Engineer · Santa Clara, CA
Principal DSP Engineer · Santa Clara, CA
Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/AEC/Microled/ODSP/PHY/AI Connectivity · Santa Clara, CA
Senior Staff Engineer, Firmware Development · 2 Locations
Software Engineer Intern · Madrid
Principal Engineer - Subsystem CoE Emulation · Bangalore
Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026) · Santa Clara, CA
Sr. Distinguished Engineer, Data Center Management & Control Plane · Santa Clara, CA
Principal Product Engineer - NPI (CPO and Optical Pluggables) · 4 Locations
Design Verification Engineer Intern - Fall 2026 · Ottawa, Canada
Senior Financial Analyst · 2 Locations
Senior Staff Coherent DSP Applications Engineer · Santa Clara, CA
Sr Principal Program Manager · 2 Locations
Test Engineering Director · Santa Clara, CA
Sr Staff Engineer Program Manager · 2 Locations
DSP Architect · Santa Clara, CA
T4 - Hardware & Silicon Validation Senior Staff Engineer · Santa Clara, CA
Senior Software Engineer (Linux Kernel - Networking) · 2 Locations
Staff Engineer • Custom Solutions Engineering - SoC · Pune
Senior Staff/Principal SQA Engineer (Firmware/Embedded Testing, C/C++, Python/Bash) · IN - Hyderabad
Analog Layout Manager · Pavia, Italy
Package Reliability Engineer · Santa Clara, CA
Associate Workplace Specialist · Austin, TX
Sr. Staff Manager (Storage Protocol/ Fibre Channel Architecture & Development) · Pune
Analog IC Design Engineer · Bangalore
Global L&D Program Manager – APAC · Singapore
Staff Quality & Reliability Engineer - Program Manager · Santa Clara, CA
Staff Validation Engineer, Photonic Fabric · Santa Clara, CA
Analog Layout Staff Engineer · Pavia, Italy
Senior Manager, Analog Layout Design · Santa Clara, CA
Design Verification Engineer - Early Career · Ottawa, Canada
Senior Network Architect · Santa Clara, CA
Technical Program Manager - Central CAD & Design Services · Santa Clara, CA
Engineering Program Manager / Project Manager · Pavia, Italy
Embedded Software Senior Staff Engineer · Madrid
Embedded Software Engineer · Madrid
Principal Engineer - Digital IC Design · Pavia, Italy
Firmware Engineering Intern · Pavia, Italy
Optical Test Engineer · Ottawa, Ontario, Canada
China Distribution Manager · 2 Locations
System Hardware (SIPI) Engineer, Principle · Ho Chi Minh
Silicon Validation Engineer Junior/Intern · Pavia, Italy
Senior Manager, FP&A · 2 Locations
Staff Engineer, Firmware Development · Osaka
High Speed PCB Senior Staff Layout Designer (RF / Optics) · Ottawa, Canada
Staff Engineer, Hardware Application Engineering — Lab Operations · Santa Clara, CA
Engineering Program Manager · 3 Locations
Director, Legal, Compliance & Workplace Applications · Santa Clara, CA
Principal Hardware Engineer, Optics · San Diego, CA
Staff Hardware Engineer, Optics · San Diego, CA
Analog Layout Senior Engineer · Bangalore
Analog Layout Senior Staff Engineer · Bangalore
Senior Staff Validation Engineer · IN - Bangalore
Engineering IP Program Manager, Sr. Principal · 2 Locations
Lead Analog Design Engineer (Principal) · Santa Clara, CA
Senior Principal Engineer, Architecture ASIC / System · 2 Locations
Senior Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis · San Diego, CA
Senior Staff Engineer, ASIC/VLSI Synthesis and Design · San Diego, CA
Principal Engineer, ASIC/VLSI Synthesis and Design · San Diego, CA
Principal Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis · San Diego, CA
Sr Staff Manager - Physical Design · Bangalore
Software Engineering Director · Santa Clara, CA
Forward Error Correction Engineer · Cordoba, Argentina
Forward Error Correction Intern · Cordoba, Argentina
Senior Staff Design Verification Engineer – Memory Sub-System (LPDDR/DDR/HBM ) · Santa Clara, CA
System Level Electrical Validation Engineer · Yokneam
Technical Lead, IC Design · Santa Clara, CA
System Validation Senior Staff Engineer · Yokneam
SoC / RTL Low-Power Expert · US-CA - Santa Clara
Software/Firmware Engineering - Intern · Cordoba, Argentina
Post Silicon Validation Engineer · Cordoba, Argentina
Senior Analog Layout Engineer · Singapore
Coherent DSP Architecture Intern · Cordoba, Argentina
Sr. Principal Engineer, Manufacturing Infrastructure · 2 Locations
Senior Principal Product Engineer · Santa Clara, CA
Director, High Speed SerDes Application Engineering · US-CA - Santa Clara
Inside Sales Representative · 2 Locations
Software Developer Engineer in Test · Cordoba, Argentina
Senior Principal Engineer -RTL · Bangalore
Principal Engineer- CAD/EDA Tools & Design Automation Engineer · Bangalore
Principal Program Manager (Hyperscaler Cloud Data Center - full lifecycle program ownership) · 3 Locations
RTL Design Principal Engineer · Bangalore
Senior Engineering Insights Analyst - Power BI / SQL / Databricks / Semiconductor Industry · Santa Clara, CA
Senior Principal Engineer, RTL ASIC Design · Bangalore
Vulnerability Management Professional · US-TX - Austin
Field Application Engineer Intern (Hardware) · Shanghai
Frontend infrastructure CAD/tools Engineer · Bangalore
Vice President Hyperscaler Global Account Manager · Santa Clara, CA
Engineering IP Program Manager, Principal · Bangalore
Senior SQA Manager (C. C++, Python, CXL, PCIE) · Hyderabad
Senior Staff Engineering Program Manager – Custom Silicon (APAC) · Singapore
Director of SoC Design Verification · San Diego, CA
Principal Digital Design Engineer · US-CA - San Diego
Senior Analog Layout Manager · San Diego, CA
Sr Principal SoC Verification Engineer · San Diego, CA
Distinguished Engineer - SoC Verification · San Diego, CA
Sr Staff SoC Verification Engineer · San Diego, CA
Principal SoC Verification · San Diego, CA
Sr Staff Digital Design Engineer · US-CA - San Diego
Senior SoC Design Verification Manager · San Diego, CA
Director of SoC Design · US-CA - San Diego
Sr Staff Manager - SoC Design · US-CA - San Diego
Sr Principal Digital Design Engineer · US-CA - San Diego
Distinguished Engineer - Digital Design · US-CA - San Diego
Senior Staff Manager · Bangalore
Technical Lead IC Design/Principal · Ottawa, Canada
Senior Design Engineer · Petah-Tikva
Design Verification Engineer · 2 Locations
Staff Engineer - Embedded Firmware Development - CXL / PCIe / Near-memory accelerator / Memory-Expansion Controllers · Santa Clara, CA
Applied Machine Learning Scientist Intern - PhD · Santa Clara, CA
Distinguished Engineer, Switch Architect · Santa Clara, CA
Principal Engineer , Software/Firmware - CXL/PCIe · Santa Clara, CA
Sr Staff Analog Mixed-Signal Design Engineer · San Diego, CA
Sr Staff Analog Modeling/Verification Engineer · San Diego, CA
Accelerated Computing Solutions Analyst - Early Career · Santa Clara, CA
Staff Engineer, Analog Layout · Singapore
Principal SQA Engineer (L2, L3, Python Automation) · Bangalore
Physical Design Intern · Cordoba, Argentina
Digital IC Design Distinguish Engineer · Santa Clara, CA
Principal Design Verification Engineer · Irvine, CA
Link Layer architect · Santa Clara, CA
Director, IT Enterprise Applications & Platforms · Bangalore
Principal Analog/Mixed Signal CAD Engineer · Santa Clara, CA
Design Verification Engineer, Principal · Santa Clara, CA
Distinguished Engineer: Advanced Optical Engines · Santa Clara, CA
Senior Director Product Security · 3 Locations
DFT Principal Engineer · 2 Locations
senior staff signal/power integrity engineer · Yokneam
Security Developer (C, Linux, System Security, Embedded programming) · 2 Locations
Senior Staff RTL Design /Verification · 2 Locations

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