DSP System Engineering Intern
Core
Intern on next-generation high-speed serial data transmission (PHY) system architecture, focusing on DSP, modulation, coding, and optical components for 400Gb/s Ethernet protocols.
Role type
Intern, system architecture IC engineer (DSP/PHY)
Builds
Next-generation PHY designs for data infrastructure (enterprise, cloud, AI, carrier)
Domain
Semiconductor, high-speed serial data transmission, optical/electrical media
Deliverable
production ML models | product features
Required skills
Digital Signal Processing (DSP), Digital Communication, system design modeling and simulation, link budgeting, non-ideality modeling, performance/cost tradeoff analysis
Preferred skills
Analog and digital design knowledge
Technologies
System simulation tools, modeling approaches for communication systems
Responsibilities
Analyze DSP challenges and optimization directions, generate performance and cost tradeoff curves, participate in system design meetings and brainstorming sessions, collaborate with analog and digital design teams
Seniority
Intern, thesis-based project