Associate Vice President, Engineering – DCE Connectivity Hardware
Core
Lead a globally distributed engineering organization to deliver high-performance electrical and optical connectivity silicon (retimers, gearboxes, AEC, PCIe switches, Co-Packaged Optics) for AI clusters, cloud data centers, and carrier networks.
Role type
Senior IC Engineering Leader (Associate Vice President)
Builds
High-speed ASICs (200G/lane SerDes, PCIe Gen7, Co-Packaged Optics) on advanced CMOS nodes (3nm FinFET, 2nm GAAFET)
Domain
Semiconductor / High-Speed Connectivity / Advanced Process Nodes
Required skills
Digital IC design (RTL/synthesis/STA), Design verification and emulation, DFT, Physical design, Silicon validation, Advanced process node expertise (7nm and below), Global team leadership (50+ engineers), High-speed serial interfaces (PAM4, 200G/lane)
Preferred skills
GAAFET architecture experience, Backside power delivery, AI-assisted design flows, uLED integration
Technologies
3nm FinFET, 2nm GAAFET, 200G/lane PAM4, PCIe Gen7, Co-Packaged Optics, uLED, EDA tools
Responsibilities
Lead end-to-end execution of major product families from RTL to tape-out, Define technical roadmap for next-generation connectivity, Build and mentor a world-class global engineering team, Engage with hyperscaler and carrier customers on technical requirements
Seniority
Senior, hands-on IC leader with strategic oversight
