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Architecture ASIC Engineer

Cordoba, Argentina💼 Full-time🗓 2026-07-06 → 2026-07-31

Core

Design, simulate, and validate DSP ASICs for coherent optical communications systems serving Data Center interconnect and Long Haul/Metro markets.

Role type

ASIC Architecture Engineer (Coherent DSP)

Builds

High-throughput DSP ASICs for coherent optical communications

Domain

Semiconductor / Optical Communications / Signal Processing

Deliverable

production ML models | product features

Required skills

Signal processing theory, Digital communications, System-level simulation (Matlab/Python), C++ simulation, CMOS implementation knowledge, Functional verification

Preferred skills

Stochastic processing, Optical systems, Radar/LiDAR applications

Technologies

Matlab, Python, C++, CMOS

Responsibilities

Research technical literature on communications and radar systems, Write Matlab/Python simulators to evaluate DSP architectures, Propose efficient solutions for coherent DSP, Generate technical presentations, Model coherent systems at different levels of detail, Define and execute functional verification and validation

Seniority

Entry-level IC Engineer

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