Senior Staff Manager, Physical Design
Core
Lead physical design execution for assigned blocks or subsystems, delivering RTL to GDSII implementation for complex, high-performance SoCs in advanced process nodes.
Role type
Senior Manager, Physical Design
Builds
Custom Processor/ASIC solutions and data infrastructure IP
Domain
Semiconductor / ASIC Physical Design
Required skills
RTL to GDSII implementation, synthesis, floorplanning, place and route, clock tree synthesis, timing closure, power/signal integrity analysis, physical verification, team leadership, project management, EDA tools proficiency, cross-functional collaboration
Preferred skills
Physical design flow optimization, automation techniques, AI/ML-assisted design tools, global development environment experience
Technologies
Synopsys/Cadence EDA tools, GDSII, SoC design flows
Responsibilities
Lead physical design execution for assigned blocks/subsystems; Manage team of engineers including hiring and development; Drive RTL to GDSII implementation; Ensure on-time delivery meeting PPA targets; Collaborate with global PD and cross-functional teams; Provide technical guidance and mentorship.
Seniority
Senior Manager, hands-on leadership
