CareerPlan

Package Design, Signal and Power Integrity Senior Staff Engineer

Santa Clara, CA, USFull-time$141k–$211k2026-10-05 → 2026-11-11
Based in United States

Core

Develop advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond, focusing on high-speed interface design, power delivery, and signal integrity.

Role type

Senior Staff IC package design engineer (SI/PI)

Builds

Advanced IC packages for data infrastructure (enterprise, cloud, AI, carrier architectures)

Domain

Semiconductor / High-speed electronics / Advanced packaging

Required skills

Transmission line theory, EM fundamentals, frequency and time domain analysis, SI/PI design, 2-D/3-D EM simulation, power plane design, channel/circuit simulation, lab measurements (VNA, TDR), layout tools

Preferred skills

Packaging technologies, thermal/mechanical analysis, 2.5D/3D package development, CPC/CPO connectors, Python scripting for automation

Technologies

Ansys HFSS, SI-Wave, Cadence Clarity, PowerSI, ADS, Hspice, Allegro, APD, PADS

Responsibilities

Package interconnect design, modeling, and characterization; develop simulation methodology and correlate with measurements; explore new interconnect architectures and develop design rules; investigate channel/PDN behavior and establish root-cause; manage cross-functional package development

Seniority

Senior Staff, hands-on IC