Advanced Package Design Senior Staff Engineer
Core
Lead package development and electrical design for next-generation semiconductor products supporting 448 Gb/s data rates, optimizing signal integrity, power integrity, performance, and manufacturability.
Role type
Senior IC package development engineer (high-speed)
Builds
Advanced microelectronic packaging solutions for data infrastructure
Domain
Semiconductor / High-speed digital and analog ICs
Required skills
High-speed electronic packaging, package floor planning, netlist creation, BGA map definition, 2.5D/3D package development, packaging materials and substrate design rules, cross-functional team management, EM and transmission line theory, 2-D/3-D EM simulation, power plane design and analysis, Python scripting for automation
Preferred skills
CPC/CPO connector experience, IC package floor planning tools (ISP), layout tools (APD), Ansys HFSS, SI-Wave, Cadence Clarity, PowerSI, SIwave, new product introduction track record
Technologies
Ansys HFSS, SI-Wave, Cadence Clarity, PowerSI, SIwave, ISP, APD, Python
Responsibilities
Lead package development and electrical design activities including floorplanning, netlist creation, and BGA map definition; optimize signal integrity, power integrity, performance, manufacturability, reliability, and cost; work with package operations to evaluate technologies and drive layout implementation; partner with marketing, system architects, and IC design teams to define requirements and specifications
Seniority
Senior Staff, hands-on IC
