Staff CAD Engineer (Power Signal Integrity)
Core
Develop and maintain Power Signal Integrity (PSI) signoff methodology, flows, and automation for block-level and full-chip static/dynamic IR/EM analysis in advanced semiconductor nodes.
Role type
Staff IC Power Signal Integrity Engineer
Builds
Production ASIC/SoC design flows for Data Center, Networking, Automotive, and Storage markets
Domain
Semiconductor / Power Integrity / Signal Integrity
Required skills
Cadence Voltus, IR drop analysis, Electromigration (EM) analysis, Static/dynamic power analysis, Tcl scripting, Python scripting, Advanced technology nodes (7nm/5nm/3nm), Hierarchical analysis, Package-aware simulation
Preferred skills
Thermal flows, Multi-die IR/EM analysis
Technologies
Cadence Voltus, Tcl, Python, VCD, FSDB
Responsibilities
Develop and tune static/dynamic IR/EM analysis flows; Interface with EDA vendors to drive tool improvements; Develop automation scripts for flow execution and reporting; Support tapeout activities for IR/EM signoff closure; Contribute to documentation and training of global teams.
Seniority
Staff, hands-on IC
