Architecture Intern, MS - Summer 2027
Core
Define chip architectures for innovative and complex datacenter products (SmartNIC, servers, AI accelerators, switches) by engaging with customers and internal teams.
Role type
ASIC architecture intern
Builds
Custom silicon System in a Package solutions for hyperscalers and datacenter clients
Domain
Semiconductor / Datacenter Infrastructure
Required skills
System architecture for datacenter products, CMOS technology, physical design flow, programming
Preferred skills
Strong programming experience, knowledge of packaging technology
Technologies
SmartNIC, AI accelerators, switches, System in a Package
Responsibilities
Engage with customers, engineering, and marketing to define chip architectures; Identify best silicon partitioning and IP selection; Map solutions into presentations for customers; Coordinate with business units on internal IP; Document findings and present results to the team
Seniority
Intern
