Analog Engineer Intern - PhD
Core
Support the analog design team in architectural exploration and circuit implementation for high-speed optical transceivers (PLLs, DLLs, ADCs, regulators, amplifiers, TX/RX).
Role type
Analog Engineer Intern (PhD level)
Builds
High-speed optical transceivers for long-haul, metro, and datacenter communication infrastructure
Domain
Semiconductor / Optical Communications / Analog Mixed-Signal
Required skills
Analog/mixed-signal circuit design, SPICE/Spectre/MATLAB simulation, PLL/DLL/ADC design concepts, SerDes (TX/RX) knowledge, analog design tools (Virtuoso, ADE), signal integrity analysis, clock generation techniques
Preferred skills
FinFET layout considerations, high-speed design impact analysis
Technologies
Virtuoso, Spectre, ADE, MATLAB, SPICE
Responsibilities
Support architectural exploration and circuit implementation, assist in design verification, collaborate with layout/verification teams, participate in lab bring-up and debugging, document findings and contribute to design reviews
Seniority
Intern, PhD candidate