Physical design CAD engineer
Core
Physical design and methodology for next-generation high-performance processor chips in leading-edge CMOS processes for server, 5G/6G, automotive, and networking applications.
Role type
Senior IC physical design engineer
Builds
Custom Processor/ASIC solutions and data infrastructure IP
Domain
Semiconductor, SoC design, backend physical design
Deliverable
production ML models | product features
Required skills
Full-chip and sub-hierarchy integration, RTL to GDS flows, multi-voltage design implementation, static timing analysis, physical verification, shell scripting, Python scripting, TCL scripting
Preferred skills
Low-power design techniques, Cadence Genus, Cadence Innovus
Responsibilities
Collaborate with digital/RTL/analog teams for design convergence, implement multi-voltage designs using EDA tools, integrate AI-based design flows, drive design closure, mentor junior employees, write automation scripts
Seniority
Senior, hands-on IC
