Digital IC Design Engineer
Core
Implement test architecture and logic for high-speed coherent transceivers targeting 800G+ connectivity applications.
Role type
Junior Digital IC Design Engineer (RTL/Verification)
Builds
High-speed digital circuits for optical and active electrical cable connectivity solutions
Domain
Semiconductor / High-speed Digital IC Design / Data Center Connectivity
Deliverable
production ML models | product features
Required skills
RTL design (Verilog/SystemVerilog), Digital logic design, Synchronous design principles, Hardware state machines, Simulation environments (ModelSim/VCS/Questa), Debugging tools
Preferred skills
Design for Test (DFT) in VLSI, Architectural design in VLSI or FPGA, UVM verification methods, EDA tools, Linux environments
Technologies
Verilog, SystemVerilog, ModelSim, VCS, Questa, UVM, EDA tools
Responsibilities
RTL design and coding, Testbench simulation and verification, Debug design issues, Create block-level specifications and documentation, Support synthesis and timing closure teams, Participate in design reviews
Seniority
Junior, hands-on IC