Digital IC Design Engineer
Core
Implement test architecture and logic for high-speed coherent transceivers targeting 800G+ connectivity applications.
Role type
Junior Digital IC Design Engineer
Builds
High-speed digital circuits for data center and network infrastructure
Domain
Semiconductor / High-speed connectivity / VLSI
Required skills
RTL design (Verilog/SystemVerilog), Digital logic design, Testbench simulation, Debugging, Block-level specification, Synthesis support, Design reviews
Preferred skills
Design for Test (DFT) in VLSI, Architectural design in VLSI/FPGA, UVM verification, Linux environments, EDA tools
Technologies
Verilog, SystemVerilog, ModelSim, VCS, Questa, UVM, Linux, EDA tools
Responsibilities
Implement RTL design and coding, Create testbench simulation and verification, Debug design issues, Create block-level specifications and documentation, Support synthesis and timing closure, Participate in design reviews
Seniority
Junior, hands-on IC
