Senior Validation Engineer
Core
Perform analog validations on amplifiers driving optical electronic devices and receivers, validate silicon photonics, and support coherent digital signal programming to deliver high-bandwidth networking PHY Serdes IP/ICs.
Role type
Senior Hardware and Silicon Validation Engineer (Analog/Mixed-Signal)
Builds
Next-gen high-speed networking PHY Serdes IP/ICs for internal and external customers
Domain
Semiconductor, Data Infrastructure, Silicon Photonics, High-Speed Networking
Required skills
Analog and mixed-signal knowledge, High-speed PHY/Serdes understanding, Python programming, Matlab programming, Electrical parameter characterization, Circuit tuning (peaking, bandwidth, FIFO, adaptation algorithms), PCB schematics design, Bench automation library creation
Preferred skills
None stated
Technologies
Python, Matlab, PCB schematics, Optical electronic devices, Receivers, Amplifiers, CDR loops, CTLE, PLL
Responsibilities
Engage with functional teams (digital, analog, firmware) to develop high-speed networking PHY Serdes IP/ICs; Collect and analyze massive bench data to drive tuning parameters; Characterize electrical parameters (Tx jitters, CDR loops, CTLE, PLL); Tune internal circuits to optimize operating margin under stressed PVT conditions; Collaborate with SI and layout teams to build engineering boards; Create and maintain bench automation libraries.
Seniority
Senior, hands-on IC
