Senior Staff Physical Verification CAD Engineer
Core
Developing next-generation automated design flow and add-on tools for physical verification (PV) to support Marvell's IC design infrastructure and methodology.
Role type
Senior Staff IC Physical Verification CAD Engineer
Builds
Automated physical verification flows and tooling for advanced semiconductor nodes (2nm, 3nm, N5/N5A, 3DIC, PMIC)
Domain
Semiconductor / IC Design / Physical Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Physical verification flow development, EDA tool expertise (Cadence, Synopsys, Mentor Graphics), scripting (Tcl, Perl, Python), IC design flow knowledge (RTL to back-end), project leadership, technical mentorship
Preferred skills
Synopsys ICV, Mentor Calibre svrf/tvf
Technologies
Cadence, Synopsys, Mentor Graphics, Tcl, Perl, Python, Synopsys ICV, Mentor Calibre
Responsibilities
Develop and maintain leading-edge PV flows for various Business Units, deploy and support these flows, integrate tools within the overall CAD platform, interface with EDA vendors for optimal tool usage, support third-party IP onboarding
Seniority
Senior Staff, hands-on IC with strategic influence
