CareerPlan

Analog Layout Intern - Bachelor's Degree

SingaporeInternship2026-10-01 → 2026-11-10
Based in Singapore

Core

Physical design of high-speed analog-mixed signal layouts and verification (DRC/LVS) for semiconductor solutions.

Role type

Analog Layout Intern

Builds

High-speed analog-mixed signal IC layouts

Domain

Semiconductor / Analog Mixed-Signal Design

Required skills

Semiconductor technology knowledge, Circuit design principles, EDA tools (Cadence Virtuoso, Calibre), Analog layout techniques

Preferred skills

Experience with Cadence Virtuoso, Experience with Calibre DRC/LVS

Technologies

Cadence Virtuoso, Calibre

Responsibilities

Create physical layouts for high-speed analog-mixed signal designs, Perform Design Rule Checking (DRC), Perform Layout Versus Schematic (LVS) verification

Seniority

Intern