CareerPlan

Senior Staff Advanced Packaging Design Engineer

Burlington, VT, USFull-time$143k–$211k2026-10-26 → 2026-11-10

Core

Lead package design and architecture development for next-generation HPC, AI, and networking solutions, focusing on signal, power, thermal, and mechanical integrity of 2.5D/3D packages.

Role type

Senior Staff Advanced Packaging Design Engineer

Builds

High-performance multi-chip packages (CoWoS, EMIB, CPO, CPC) and advanced substrates for data infrastructure.

Domain

Semiconductor manufacturing / Advanced Packaging / HPC & AI

Required skills

Advanced packaging architecture (2.5D/3D), substrate/board design, DFM, signal/power integrity, HBM/DDR/SerDes technologies, cross-functional leadership

Preferred skills

Simulation interpretation, tool development, library maintenance

Technologies

Cadence 3DIC/ISP/APD/Sigrity/Innovus/Virtuoso, Ansys, AutoCAD, SolidWorks

Responsibilities

Lead small project teams to deliver packaging solutions; drive package definition and architecture for performance-line products; interface with suppliers to ensure manufactability and performance.

Seniority

Senior Staff, hands-on IC with leadership