Digital IC Design Intern
Core
Intern supporting the Power Design team in chip power estimation, analysis, and optimization across the design lifecycle.
Role type
Digital IC Design Intern (Power)
Builds
Power-efficient semiconductor chips for data infrastructure, enterprise, cloud, AI, and carrier architectures.
Domain
Semiconductor / Digital IC Design / Power Management
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
circuit design, circuit theory, digital logic design, electronics
Preferred skills
power analysis, RTL design, physical design, automation, AI tools for design flow
Technologies
RTL, physical design tools, power calculators, AI tools
Responsibilities
Ramp up on chip power estimation methodologies and tools; Perform power analysis and identify optimization opportunities; Explore and implement power optimizations at RTL and physical design levels; Develop automation to improve power analysis flows; Analyze power trends and identify high-impact areas for improvement; Collaborate with RTL, physical design, architecture, and power teams; Present key highlights of work and successes to the team.