Digital IC Design Intern
Core
Intern supporting the Power Design team in chip power estimation, analysis, and optimization across the RTL and physical design lifecycle.
Role type
Digital IC Design Intern (Power)
Builds
Power models, estimation capabilities, and automation flows for chip design.
Domain
Semiconductor / Digital IC Design / Power Efficiency
Required skills
Circuit design, circuit theory, digital logic design, electronics, power analysis, RTL design, physical design, automation, AI tools
Preferred skills
None stated
Technologies
None stated
Responsibilities
Ramp up on chip power estimation methodologies and tools; Perform power analysis and identify optimization opportunities; Explore and implement power optimizations at RTL and physical design levels; Develop automation to improve power analysis flows; Analyze power trends; Collaborate with architecture, RTL, verification, and physical design teams.
Seniority
Intern
