Ph.D. Intern - Architecture, DSP & Systems Architecture
Core
Architect, model, and evaluate system-level designs for switching, interconnect, or DSP applications for hyperscale AI infrastructure.
Role type
Ph.D. Intern, Systems Architecture & DSP
Builds
Next-generation Teralynx switch silicon, high-speed optical/electrical links, and AI fabric connectivity platforms.
Domain
Semiconductor, Data Center, AI Infrastructure, High-Speed Networking
Deliverable
production ML models
Required skills
Computer architecture, Digital signal processing, Networking algorithms, System-level modeling and simulation, Analytical fundamentals (signal processing, queuing, information theory)
Preferred skills
Ethernet switching architectures, PAM4/coherent DSP, Custom compute architecture, Ultra Ethernet Consortium protocols, Open networking platforms
Technologies
MATLAB, Python, C++, Verilog, SystemVerilog, PCIe, NVLink, Teralynx, SONiC, P4
Responsibilities
Architect and model system designs for switching/interconnect/DSP; Develop and optimize DSP algorithms for high-speed links; Design and analyze network architectures for AI fabrics; Collaborate with engineering teams to validate assumptions; Build behavioral models and simulations; Present architectural proposals and results.
Seniority
Ph.D. Candidate, Research Intern