Senior Engineer, Logic Equivalence CAD
Core
Develop and maintain Equivalence Checking infrastructure to ensure RTL-to-Gate and Gate-to-Gate transformations preserve functional correctness for Marvell's semiconductor designs.
Role type
Staff IC Logic Equivalence Engineer
Builds
Equivalence Checking flows and functional ECO flows for tape-out readiness
Domain
Semiconductor Design / Electronic Design Automation (EDA)
Required skills
Equivalence Checking, Functional ECO flows, Synthesis transforms, RTL coding, DFT, Tcl scripting, Debugging, Power intent management, EDA tool integration
Preferred skills
Experience with both Cadence Conformal and Synopsys Formality, Low-power checks
Technologies
Cadence Conformal, Synopsys Formality, Tcl
Responsibilities
Develop and maintain Equivalence Checking flows; Debug equivalence issues; Collaborate with synthesis and DFT teams; Support functional ECO and low-power checks; Interface with EDA vendors
Seniority
Staff, hands-on IC
