Advanced Package Architect Sr. Staff Engineer
Core
Develop advanced microelectronic packages (C4, BGA) for high-speed interfaces, optimizing SI/PI, layout efficiency, and manufactability from concept to tapeout.
Role type
Senior IC Package Architect
Builds
Advanced IC packages supporting high-speed data infrastructure
Domain
Semiconductor / Advanced Packaging
Required skills
C4 and BGA ball map development, netlist mapping across dies/interposers/substrates, die placement and padstack definition, Package Requirement Document (PRD) creation, Cadence OrbitIO/Integrity System Planner proficiency, 2D/2.5D packaging architecture knowledge, thermal/mechanical constraint analysis, foundry design rule familiarity
Preferred skills
SI/PI simulation interpretation, emerging packaging knowledge (CoWoS, EMIB, CPO, CPC), tool/process flow development, scripting for automation
Technologies
Cadence OrbitIO, Integrity System Planner (ISP)
Responsibilities
Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency; plan and validate netlist mappings across dies, interposers, and substrates; define die placement, padstacks, net assignments, and package-level connectivity; create and maintain Package Requirement Documents (PRDs) detailing die arrangements, stackups, and design constraints
Seniority
Senior Staff Engineer
