Staff Engineer- DFT
Core
Design and implement DFT methodology and flow for next-generation optical DSP ASICs in hyperscale data center and AI infrastructure markets.
Role type
Staff DFT Engineer (ASIC)
Builds
High-bandwidth optical transceivers and coherent DSP devices for fiber optical networks and electrical interconnects.
Domain
Semiconductor / Digital Design / Test Engineering
Required skills
Scan design, ATPG, MBIST, JTAG, Synopsys tools, Siemens tools, Verilog, SystemVerilog, Tcl, Python, Perl, ASIC flow, STA, gate-level simulation
Technologies
Synopsys, Siemens, TSMC advanced process nodes
Responsibilities
Implement scan, compression, OCC, wrappers, and MBIST; Run ATPG and drive coverage improvement; Run DFT DRC and debug failures; Support DFT timing constraints closure; Generate patterns for silicon bring-up and ATE debug; Write scripts for flow automation.
Seniority
Staff, hands-on IC
