Staff Engineer - Validation
Core
Define and develop validation/test plans for chip-level silicon validation of High-Speed SerDes IPs (PLL, Equalizer, ADC, DAC, Driver) and implement bench automation in Python.
Role type
Staff Engineer - Hardware Validation (Silicon)
Builds
High-speed analog and mixed signal semiconductor solutions for data infrastructure (cloud, carrier, datacenter)
Domain
Semiconductor / High-Speed SerDes / Analog & Mixed Signal
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog/digital circuit design, semiconductor chip lab testing, test script development, electronic test equipment usage, Python, C++, Matlab, Excel VBA, IP debugging, SoC integration
Preferred skills
SerDes technologies (PCIe, Ethernet, USB, SATA, SAS, CPRI, JESD), high-frequency lab instruments (DSO, SSA, VNA), HW-SW integration
Technologies
Python, C++, Matlab, Excel VBA, PCIe, Ethernet, USB, SATA, SAS, CPRI, JESD, DSO, SSA, VNA
Responsibilities
Create and develop validation and test plans for Chip level silicon validation/characterization on Marvell's internal IPs; Implement bench automation in Python to execute automatic data collection; Debug failures and provide IP debugging support to SoC teams; Develop technical collateral such as application notes, user guides, and data sheets.
Seniority
Staff, hands-on IC with strategic input