ASIC Verification Engineering
931 open positions
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Senior Principal GPU verification Engineer NxpBangalore 3mo Lead verification of complex GPU IPs and subsystems to ensure functional correctness, performance, and first-pass silicon success.
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Staff Verification Engineer ArmAustin, Texas $191k–$191k3mo Verifying functionality of High Speed IOs (PCIe, CXL) at the Sub-system level for next-generation SoCs.
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Staff Digital Verification Engineer ON SemiconductorCork, Co. Cork, Ireland 3mo Verification of digital top-level subsystem IP for next-generation automotive and intelligent power applications within the TREO platform.
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Senior ASIC Design Verification Engineer - Terawave BlueoriginCentral Texas, US $230k–$230k3mo Lead verification planning and execution for complex digital subsystems in next-generation Satellite communication ASICs.
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Senior Verification Engineer NVIDIAIndia, Bengaluru 3mo Verify micro-architecture and architecture features for NVIDIA's next-generation CPUs and SoCs with AI capabilities, supporting applications in self-driving cars, gaming consoles, and automated machines.
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Senior Design Verification Engineer Texas InstrumentsBengaluru, Karnataka, India 3mo Lead chip-level design verification for advanced Ethernet PHY devices, focusing on DSP data path validation, FPGA emulation, and analog/mixed-signal system performance.
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Senior Engineer, Design Verification Engineering AnalogdevicesRemote $135k–$135k3mo Senior Design Verification Engineer supporting product development of industry-leading analog, digital, and mixed-signal ICs through behavioral modeling, full-chip verification, and simulation infrastructure.
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Lead Design Engineer(Virtual Solution) CadenceSHANGHAI 3mo Design and develop system-level AVIP solutions for emulation/prototyping platforms and build integrated Accelerated Verification IP environments for complex SoC validation.
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Senior AMS Verification Engineer Renesas-ElectronicsIstanbul, tr 3mo Lead verification planning and execution for analog IC components at block and full-chip levels, developing event-driven models and aligning verification goals with design intent.
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Formal Verification - DV EtchedSan Jose 3mo Drive formal verification strategy and execution for custom IP, interface IP, and SoC subsystems in ASICs to prove design correctness and expose deep corner-case bugs.
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Engineer, Design MicronAvezzano (AQ), Italy $34k–$57k3mo Design and validate DFT architectures and test strategies for advanced NAND Flash memory products to ensure testability, quality, and manufacturability.
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GPU Design Verification Engineer MediaTekSan Diego, CA 3mo Develop and maintain verification frameworks and testbenches for GPU IP to ensure functional coverage and performance optimization across mobile, automotive, and IoT SoCs.
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Staff Design Verification Engineer SifiveHsinchu, Taiwan 3mo Ensuring fidelity of new highly configurable RISC-V CPU cores and related IPs for clients in autonomous driving, 5G, wearables, and IoT.
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Associate Staff CAD Engineer - Physical Verification SilabsAustin $125k–$125k3mo Develop and support physical verification rule decks (DRC, LVS, dummy fill, antenna, density, PERC, XOR) and automate verification flows for highly integrated SoCs.
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CPU Design Verification Engineer AlteraBengaluru, Karnataka, India 3mo Develop and execute verification plans to validate Altera's RISC-V processor family logic against architectural and microarchitectural specifications.
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Design Verification Engineering Lead - Silicon One CiscoSan Jose, California, US $211k–$211k3mo Architect and develop DV infrastructure for complex ASICs, ensuring robust verification and coverage for Cisco's data center solutions.
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Digital Design Verification Engineer OlixBristol, UK 3mo Own end-to-end verification of high-throughput digital pipelines supporting multi-GSPS input rates, continuous streaming data paths, and deep pipelining in advanced CMOS nodes.
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Senior Quantum Design Verification Engineer MicrosoftUnited States, Washington, Redmond 3mo Define pre-silicon simulation and post-silicon validation plans for SoC and IP, creating verification environments and tests for RTL/netlist designs while managing repositories and bug tracking.
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Sr. Staff/Staff Design Verification Engineer CerebrasHeadquarters/Sunnyvale Office $250k–$250k3mo Develop and implement verification strategies, detailed tests, and coverage plans for the world's largest AI chip architecture to ensure high-quality design working on first silicon.
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R&D Digital Design Engineer BroadcomUSA-CA San Jose Innovation Drive $122k–$122k3mo Verification of cutting edge network switch routing designs (L2/L3) for Tomahawk ASICs supporting Scale-Out and Scale-Up AI Networks.
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Physical Design Verification Manager, Annapurna Labs
AmazonCupertino, California, United States
$201k–$201k3mo
Lead end-to-end physical verification strategy for AWS's most complex SoCs (≥100M gates) from floorplan to tape-out.
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Verification Engineer - GPU / Semiconductor↗ European Tech RecruitCork, County Cork, Ireland 3mo Develop performance verification tests, debug GPGPU architecture bottlenecks, and deploy verification methodologies for GPU products.
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